We introduce a taxonomic study of parallel programming models
on High-Performance architectures. We review the parallel
architectures(shared and distributed memory), and then the
development of the architectures through the emergence of the
heter
ogeneous and hybrid parallel architectures.
We review important parallel programming model as the
Partitioned Global Address Space (PGAS) model, as model for
distributed memory architectures and the Data Flow model as
model to heterogeneous and hybrid parallel programming. Finally
we present several scenarios for the use of this taxonomic study.
In this paper, we processed an array which represents the
human hand image to get the characteristics of this image. So,
we used FPGA technique, and the processing operation is
partitioned into three threads which is carried out in parallel.
Each
thread is carried out using the pipeline technique by
partitioning thread into four segments. After that, we evaluated
the speedup that we get in result of using the pipeline technique
and the parallel threads. So, we have the possibility to design an
embedded system integrated into chip (SoC), and using the
mobile phones as integral devices support the software and
hardware resources.
معالجة الصور
إيماءات الصم و البكم
تعرف على الأشكال
معالجة أنبوبية
مسالك
معالجة تفرعية
دارات قابلة للبرمجة
لغة توصيف مادية
نظام مضمن
نظام ضمن شريحة
تسريع
Deaf and Mute Gestures
Images Processing
Patterns Recognition
Pipeline Processing
Threads
Parallel Processing
(Programmable Circuits (FPGA
(Hardware Description Language (VHDL
(System on Chip (SoC
المزيد..