The effect of mechanical fatigue on structural performances of gold devices is investigated. The pull-in voltage of special testing micro-systems is monitored during the cyclical load application. The mechanical collapse is identified as a dramatic loss of mechanical strength of the specimen. The fatigue limit is estimated through the stair-case method by means of the pull-in voltage measurements. Measurements are performed by means of the optical interferometric technique.
The very significant growth of the wireless communication industry has spawned tremendous interest in the development of high performances radio frequencies (RF) components. Micro Electro Mechanical Systems (MEMS) are good candidates to allow reconfi
gurable RF functions such as filters, oscillators or antennas. This paper will focus on the MEMS electromechanical resonators which show interesting performances to replace SAW filters or quartz reference oscillators, allowing smaller integrated functions with lower power consumption. The resonant frequency depends on the material properties, such as Youngs modulus and density, and on the movable mechanical structure dimensions (beam length defined by photolithography). Thus, it is possible to obtain multi frequencies resonators on a wafer. The resonator performance (frequency, quality factor) strongly depends on the environment, like moisture or pressure, which imply the need for a vacuum package. This paper will present first resonator mechanisms and mechanical behaviors followed by state of the art descriptions with applications and specifications overview. Then MEMS resonator developments at STMicroelectronics including FEM analysis, technological developments and characterization are detailed.
A simple and fast process for micro-electromechanical (MEM) resonators with deep sub-micron transduction gaps in thin SOI is presented in this paper. Thin SOI wafers are important for advanced CMOS technology and thus are evaluated as resonator subst
rates for future co-integration with CMOS circuitry on a single chip. As the transduction capacitance scales with the resonator thickness, it is important to fabricate deep sub-micron trenches in order to achieve a good capacitive coupling. Through the combination of conventional UV-lithography and focused ion beam (FIB) milling the process needs only two lithography steps, enabling therefore a way for fast prototyping of MEM-resonators. Different FIB parameters and etching parameters are compared in this paper and their effect on the process are reported.
In this paper, an architecture designed for electrical measurement of the quality factor of MEMS resonators is proposed. An estimation of the measurement performance is made using PSPICE simulations taking into account the components non-idealities.
An error on the measured Q value of only several percent is achievable, at a small integration cost, for sufficiently high quality factor values (Q > 100).
A new Room Temperature (RT) 0-level vacuum package is demonstrated in this work, using amorphous silicon (aSi) as sacrificial layer and SiO2 as structural layer. The process is compatible with most of MEMS resonators and Resonant Suspended-Gate MOSFE
T [1] fabrication processes. This paper presents a study on the influence of releasing hole dimensions on the releasing time and hole clogging. It discusses mass production compatibility in terms of packaging stress during back-end plastic injection process. The packaging is done at room temperature making it fully compatible with IC-processed wafers and avoiding any subsequent degradation of the active devices.
This paper presents one MEMS design tool with total six design flows, which makes it possible that the MEMS designers are able to choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interc
onnected by six interfaces. The three levels are lumped-element model based system level, finite element analysis based device level and process level, which covers nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that the enough flexibility in the design flow can really increase the design efficiency.