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Register a new userLimits of III-V nanowire growth based on particle dynamics
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Crystal growth of semiconductor nanowires from a liquid droplet depends on the stability of this droplet at the liquid-solid interface. By combining in-situ transmission electron microscopy with theoretical analysis of the surface energies involved, we show that truncation of the interface can increase the stability of the droplet, which in turn increases the range of parameters for which successful nanowire growth is possible. In addition to determining the limits of nanowire growth, this approach allows us to experimentally estimate relevant surface energies, such as the GaAs ${11bar{2}0}$ facet.
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Nanowire (NW) crystal growth via the vapour_liquid_solid mechanism is a complex dynamic process involving interactions between many atoms of various thermodynamic states. With increasing speed over the last few decades many works have reported on various aspects of the growth mechanisms, both experimentally and theoretically. We will here propose a general continuum formalism for growth kinetics based on thermodynamic parameters and transition state kinetics. We use the formalism together with key elements of recent research to present a more overall treatment of III_V NW growth, which can serve as a basis to model and understand the dynamical mechanisms in terms of the basic control parameters, temperature and pressures/beam fluxes. Self-catalysed GaAs NW growth on Si substrates by molecular beam epitaxy is used as a model system.
This article presents the use of flexible carbon substrates for the growth of III-nitride nanowire light emitters. A dense packing of gallium nitride nanowires were grown on a carbon paper substrate. The nanowires grew predominantly along the a-plane direction, normal to the local surface of the carbon paper. Strong photo- and electro-luminescence was observed from InGaN quantum well light emitting diode nanowires.
This article presents the use of flexible metal foam substrates for the growth of III-nitride nanowire light emitters to tackle the inherent limitations of thin-film light emitting diodes as well as fabrication and application issues of traditional substrates. A dense packing of gallium nitride nanowires were grown on a nickel foam substrate. The nanowires grew predominantly along the a-plane direction, normal to the local surface of the nickel foam. Strong luminescence was observed from undoped GaN and InGaN quantum well light emitting diode nanowires.
III-V nanowires are useful platforms for studying the electronic and mechanical properties of materials at the nanometer scale. However, the costs associated with commercial nanowire growth reactors are prohibitive for most research groups. We developed hot-wall and cold-wall metal organic vapor phase epitaxy (MOVPE) reactors for the growth of InAs nanowires, which both use the same gas handling system. The hot-wall reactor is based on an inexpensive quartz tube furnace and yields InAs nanowires for a narrow range of operating conditions. Improvement of crystal quality and an increase in growth run to growth run reproducibility are obtained using a homebuilt UHV cold-wall reactor with a base pressure of 2 X 10$^{-9}$ Torr. A load-lock on the UHV reactor prevents the growth chamber from being exposed to atmospheric conditions during sample transfers. Nanowires grown in the cold-wall system have a low defect density, as determined using transmission electron microscopy, and exhibit field effect gating with mobilities approaching 16,000 cm$^2$(V.s).
We propose a new triple-junction solar cell structure composed of a III-V heterojunction bipolar transistor solar cell (HBTSC) stacked on top of, and series-connected to, a Si solar cell (III-V-HBTSC-on-Si). The HBTSC is a novel three-terminal device, whose viability has been recently experimentally demonstrated. It has the theoretical efficiency limit of an independently-connected double-junction solar cell. Here, we perform detailed balance efficiency limit calculations under one-sun illumination that show that the absolute efficiency limit of a III-V-HBTSC-on-Si device is the same as for the conventional current-matched III-V-on-Si triple-junction (47% assuming black-body spectrum, 49% with AM1.5G). However, the range of band-gap energies for which the efficiency limit is above 40% is much wider in the III-V-HBTSC-on-Si stack case. From a technological point of view, the lattice-matched GaInP/GaAs combination is particularly interesting, which has an AM1.5G efficiency limit of 47% with the HBTSC-on-Si structure and 39% if the current-matched III-V-on-Si triple junction is considered. Moreover, we show that interconnecting the terminals of the HBTSC to achieve a two-terminal GaInP/GaAs-HBTSC-on-Si device only reduces the efficiency limit by three points, to 43%. As a result, the GaInP/GaAs-HBTSC-on-Si solar cell becomes a promising device for two-terminal, high-efficiency one-sun operation. For it to also be cost-effective, low-cost technologies must be applied to the III-V material growth, such as high-throughput epitaxy or sequential growth.
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