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A software framework for pipelined arithmetic algorithms in field programmable gate arrays

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 Added by Jaebak Kim
 Publication date 2017
and research's language is English




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Pipelined algorithms implemented in field programmable gate arrays are being extensively used for hardware triggers in the modern experimental high energy physics field and the complexity of such algorithms are increases rapidly. For development of such hardware triggers, algorithms are developed in $texttt{C++}$, ported to hardware description language for synthesizing firmware, and then ported back to $texttt{C++}$ for simulating the firmware response down to the single bit level. We present a $texttt{C++}$ software framework which automatically simulates and generates hardware description language code for pipelined arithmetic algorithms.



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