Efficiently Engineered Room Temperature Single Photons in Silicon Carbide

We report the first observation of stable single photon sources in silicon carbide (SiC). These sources are extremely bright and operate at room temperature demonstrating that SiC is a viable material in which to realize various quantum information, computation and photonic applications. The maximum single photon count rate detected is 700k counts/s with an inferred quantum efficiency around 70%. The single photon sources are due to intrinsic deep level defects constituted of carbon antisite-vacancy pairs. These are shown to be formed controllably by electron irradiation. The variability of the temporal kinetics of these single defects is investigated in detail.

Dopant-enhanced solid phase epitaxy in buried amorphous silicon layers

The kinetics of intrinsic and dopant-enhanced solid phase epitaxy (SPE) are stud- ied in buried amorphous Si (a-Si) layers in which SPE is not retarded by H. As, P, B and Al profiles were formed by multiple energy ion implantation over a con- centration range of 1 - 30 x 1019 /cm3. Anneals were performed in air over the temperature range 460-660 oC and the rate of interface motion was monitored us- ing time resolved reflectivity. The dopant-enhanced SPE rates were modeled with the generalized Fermi level shifting model using degenerate semiconductor statis- tics. The effect of band bending between the crystalline and amorphous sides of the interface is also considered.

Intrinsic and dopant enhanced solid phase epitaxy in amorphous germanium

The kinetics of intrinsic and dopant-enhanced solid phase epitaxy (SPE) is stud- ied in amorphous germanium (a-Ge) layers formed by ion implantation on <100> Ge substrates. The SPE rates were measured with a time-resolved reflectivity (TRR) system between 300 and 540 degC and found to have an activation energy of (2.15 +/- 0.04) eV. To interpret the TRR measurements the refractive indices of the a-Ge layers were measured at the two wavelengths used, 1.152 and 1.532 {mu}m. For the first time, SPE rate measurements on thick a-Ge layers (>3 {mu}m) have also been performed to distinguish between bulk and near-surface SPE growth rate behavior. Possible effects of explosive crystallization on thick a-Ge layers are considered. When H is present in a-Ge it is found to have a considerably greater retarding affect on the SPE rate than for similar concentrations in a-Si layers. Hydrogen is found to reduce the pre-exponential SPE velocity factor but not the activation energy of SPE. However, the extent of H indiffusion into a-Ge surface layers during SPE is about one order of magnitude less that that observed for a-Si layers. This is thought to be due to the lack of a stable surface oxide on a-Ge. Dopant enhanced kinetics were measured in a-Ge layers containing uniform concentration profiles of implanted As or Al spanning the concentration regime 1-10 x1019 /cm-3. Dopant compensation effects are also observed in a-Ge layers containing equal concentrations of As and Al, where the SPE rate is similar to the intrinsic rate. Various SPE models are considered in light of these data.

Drain current modulation in a nanoscale field-effect-transistor channel by single dopant implantation

We demonstrate single dopant implantation into the channel of a silicon nanoscale metal-oxide-semiconductor field-effect-transistor. This is achieved by monitoring the drain current modulation during ion irradiation. Deterministic doping is crucial for overcoming dopant number variability in present nanoscale devices and for exploiting single atom degrees of freedom. The two main ion stopping processes that induce drain current modulation are examined. We employ 500~keV He ions, in which electronic stopping is dominant, leading to discrete increases in drain current and 14~keV P dopants for which nuclear stopping is dominant leading to discrete decreases in drain current.

Deep level transient spectroscopy study for the development of ion-implanted silicon field-effect transistors for spin-dependent transport

A deep level transient spectroscopy (DLTS) study of defects created by low-fluence, low-energy ion implantation for development of ion-implanted silicon field-effect transistors for spin-dependent transport experiments is presented. Standard annealing strategies are considered to activate the implanted dopants and repair the implantation damage in test metal-oxide-semiconductor (MOS) capacitors. Fixed oxide charge, interface trapped charge and the role of minority carriers in DLTS are investigated. A furnace anneal at 950 $rm ^{o}$C was found to activate the dopants but did not repair the implantation damage as efficiently as a 1000 $rm ^{o}$C rapid thermal anneal. No evidence of bulk traps was observed after either of these anneals. The ion- implanted spin-dependent transport device is shown to have expected characteristics using the processing strategy determined in this study.