Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userToward Low-Temperature Solid-Source Synthesis of Monolayer MoS2
77
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
Two-dimensional (2D) semiconductors have been proposed for heterogeneous integration with existing silicon technology; however, their chemical vapor deposition (CVD) growth temperatures are often too high. Here, we demonstrate direct CVD solid-source precursor synthesis of continuous monolayer (1L) MoS$_2$ films at 560 C in 50 min, within the 450-to-600 C, 2 h thermal budget window required for back-end-of-the-line compatibility with modern silicon technology. Transistor measurements reveal on-state current up to ~140 $mathrm{{mu}A/{mu}m}$ at 1 V drain-to-source voltage for 100 nm channel lengths, the highest reported to date for 1L MoS$_2$ grown below 600 C using solid-source precursors. The effective mobility from transfer length method test structures is $mathrm{29 pm 5 cm^2V^{-1}s^{-1}}$ at $mathrm{6.1 times 10^{12} cm^{-2}}$ electron density, which is comparable to mobilities reported from films grown at higher temperatures. The results of this work provide a path toward the realization of high-quality, thermal-budget-compatible 2D semiconductors for heterogeneous integration with silicon manufacturing.
rate research
Read More
Inducing electrostatic doping in 2D materials by laser exposure (photodoping effect) is an exciting route to tune optoelectronic phenomena. However, there is a lack of investigation concerning in what respect the action of photodoping in optoelectronic devices is local. Here, we employ scanning photocurrent microscopy (SPCM) techniques to investigate how a permanent photodoping modulates the photocurrent generation in MoS2 transistors locally. We claim that the photodoping fills the electronic states in MoS2 conduction band, preventing the photon-absorption and the photocurrent generation by the MoS2 sheet. Moreover, by comparing the persistent photocurrent (PPC) generation of MoS2 on top of different substrates, we elucidate that the interface between the material used for the gate and the insulator (gate-insulator interface) is essential for the photodoping generation. Our work gives a step forward to the understanding of the photodoping effect in MoS2 transistors and the implementation of such an effect in integrated devices.
The vertical stacking of van der Waals (vdW) materials introduces a new degree of freedom to the research of two-dimensional (2D) systems. The interlayer coupling strongly influences the band structure of the heterostructures, resulting in novel properties that can be utilized for electronic and optoelectronic applications. Based on microwave microscopy studies, we report quantitative electrical imaging on gated molybdenum disulfide (MoS2)/tungsten diselenide (WSe2) heterostructure devices, which exhibit an intriguing anti-ambipolar effect in the transfer characteristics. Interestingly, in the region with significant source-drain current, electrons in the n-type MoS2 and holes in the p-type WSe2 segments are nearly balanced, whereas the heterostructure area is depleted of mobile charges. The configuration is analogous to the p-i-n diode, where the injected carriers dominate in the recombination current. The spatial evolution of local conductance can be ascribed to the lateral band bending and formation of depletion regions along the line of MoS2-heterostructure-WSe2. Our work vividly demonstrates the microscopic origin of novel transport behaviors, which is important for the vibrant field of vdW heterojunction research.
The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for two-dimensional (2D) semiconductors integrated with flexible substrates or multi-layered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS$_2$ transistors. Using Raman thermometry we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance (TBC) of the MoS$_2$ interface (14 $pm$ 4 MWm$^-$$^2$K$^-$$^1$) is an order magnitude larger than previously thought, yet near the low end of known solid-solid interfaces. Our study also reveals unexpected insight into non-uniformities of the MoS$_2$ transistors (small bilayer regions), which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.
Here, we propose a method to determine the thickness of the most common transition metal dichalcogenides (TMDCs) placed on the surface of transparent stamps, used for the deterministic placement of two-dimensional materials, by analyzing the red, green and blue channels of transmission-mode optical microscopy images of the samples. In particular, the blue channel transmittance shows a large and monotonic thickness dependence, making it a very convenient probe of the flake thickness. The method proved to be robust given the small flake-to-flake variation and the insensitivity to doping changes of MoS2. We also tested the method for MoSe2, WS2 and WSe2. These results provide a reference guide to identify the number of layers of this family of materials on transparent substrates only using optical microscopy.
Semiconductors require stable doping for applications in transistors, optoelectronics, and thermoelectrics. However, this has been challenging for two-dimensional (2D) materials, where existing approaches are either incompatible with conventional semiconductor processing or introduce time-dependent, hysteretic behavior. Here we show that low temperature (< 200$^circ$ C) sub-stoichiometric AlO$_x$ provides a stable n-doping layer for monolayer MoS$_2$, compatible with circuit integration. This approach achieves carrier densities > 2x10$^{13}$ 1/cm$^2$, sheet resistance as low as ~7 kOhm/sq, and good contact resistance ~480 Ohm.um in transistors from monolayer MoS$_2$ grown by chemical vapor deposition. We also reach record current density of nearly 700 uA/um (>110 MA/cm$^2$) in this three-atom-thick semiconductor while preserving transistor on/off current ratio > $10^6$. The maximum current is ultimately limited by self-heating and could exceed 1 mA/um with better device heat sinking. With their 0.1 nA/um off-current, such doped MoS$_2$ devices approach several low-power transistor metrics required by the international technology roadmap
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
