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Register a new userLocal photodoping in monolayer MoS2
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Inducing electrostatic doping in 2D materials by laser exposure (photodoping effect) is an exciting route to tune optoelectronic phenomena. However, there is a lack of investigation concerning in what respect the action of photodoping in optoelectronic devices is local. Here, we employ scanning photocurrent microscopy (SPCM) techniques to investigate how a permanent photodoping modulates the photocurrent generation in MoS2 transistors locally. We claim that the photodoping fills the electronic states in MoS2 conduction band, preventing the photon-absorption and the photocurrent generation by the MoS2 sheet. Moreover, by comparing the persistent photocurrent (PPC) generation of MoS2 on top of different substrates, we elucidate that the interface between the material used for the gate and the insulator (gate-insulator interface) is essential for the photodoping generation. Our work gives a step forward to the understanding of the photodoping effect in MoS2 transistors and the implementation of such an effect in integrated devices.
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Two-dimensional (2D) semiconductors have been proposed for heterogeneous integration with existing silicon technology; however, their chemical vapor deposition (CVD) growth temperatures are often too high. Here, we demonstrate direct CVD solid-source precursor synthesis of continuous monolayer (1L) MoS$_2$ films at 560 C in 50 min, within the 450-to-600 C, 2 h thermal budget window required for back-end-of-the-line compatibility with modern silicon technology. Transistor measurements reveal on-state current up to ~140 $mathrm{{mu}A/{mu}m}$ at 1 V drain-to-source voltage for 100 nm channel lengths, the highest reported to date for 1L MoS$_2$ grown below 600 C using solid-source precursors. The effective mobility from transfer length method test structures is $mathrm{29 pm 5 cm^2V^{-1}s^{-1}}$ at $mathrm{6.1 times 10^{12} cm^{-2}}$ electron density, which is comparable to mobilities reported from films grown at higher temperatures. The results of this work provide a path toward the realization of high-quality, thermal-budget-compatible 2D semiconductors for heterogeneous integration with silicon manufacturing.
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Large capacitance enhancement is useful for increasing the gate capacitance of field-effect transistors (FETs) to produce low-energy-consuming devices with improved gate controllability. We report strong capacitance enhancement effects in a newly emerged two-dimensional channel material, molybdenum disulfide (MoS2). The enhancement effects are due to strong electron-electron interaction at the low carrier density regime in MoS2. We achieve about 50% capacitance enhancement in monolayer devices and 10% capacitance enhancement in bilayer devices. However, the enhancement effect is not obvious in multilayer (layer number >3) devices. Using the Hartree-Fock approximation, we illustrate the same trend in our inverse compressibility data.
We show that the lack of inversion symmetry in monolayer MoS2 allows strong optical second harmonic generation. Second harmonic of an 810-nm pulse is generated in a mechanically exfoliated monolayer, with a nonlinear susceptibility on the order of 1E-7 m/V. The susceptibility reduces by a factor of seven in trilayers, and by about two orders of magnitude in even layers. A proof-of-principle second harmonic microscopy measurement is performed on samples grown by chemical vapor deposition, which illustrates potential applications of this effect in fast and non-invasive detection of crystalline orientation, thickness uniformity, layer stacking, and single-crystal domain size of atomically thin films of MoS2 and similar materials.
The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for two-dimensional (2D) semiconductors integrated with flexible substrates or multi-layered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS$_2$ transistors. Using Raman thermometry we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance (TBC) of the MoS$_2$ interface (14 $pm$ 4 MWm$^-$$^2$K$^-$$^1$) is an order magnitude larger than previously thought, yet near the low end of known solid-solid interfaces. Our study also reveals unexpected insight into non-uniformities of the MoS$_2$ transistors (small bilayer regions), which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.
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