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Dimensional Expressivity Analysis of Parametric Quantum Circuits

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 Added by Lena Funcke
 Publication date 2020
  fields Physics
and research's language is English




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Parametric quantum circuits play a crucial role in the performance of many variational quantum algorithms. To successfully implement such algorithms, one must design efficient quantum circuits that sufficiently approximate the solution space while maintaining a low parameter count and circuit depth. In this paper, we develop a method to analyze the dimensional expressivity of parametric quantum circuits. Our technique allows for identifying superfluous parameters in the circuit layout and for obtaining a maximally expressive ansatz with a minimum number of parameters. Using a hybrid quantum-classical approach, we show how to efficiently implement the expressivity analysis using quantum hardware, and we provide a proof of principle demonstration of this procedure on IBMs quantum hardware. We also discuss the effect of symmetries and demonstrate how to incorporate or remove symmetries from the parametrized ansatz.



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In Variational Quantum Simulations, the construction of a suitable parametric quantum circuit is subject to two counteracting effects. The number of parameters should be small for the device noise to be manageable, but also large enough for the circuit to be able to represent the solution. Dimensional expressivity analysis can optimize a candidate circuit considering both aspects. In this article, we will first discuss an inductive construction for such candidate circuits. Furthermore, it is sometimes necessary to choose a circuit with fewer parameters than necessary to represent all relevant states. To characterize such circuits, we estimate the best-approximation error using Voronoi diagrams. Moreover, we discuss a hybrid quantum-classical algorithm to estimate the worst-case best-approximation error, its complexity, and its scaling in state space dimensionality. This allows us to identify some obstacles for variational quantum simulations with local optimizers and underparametrized circuits, and we discuss possible remedies.
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