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Register a new userA Demonstration of Implication Logic Based on Volatile (Diffusive) Memristors
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Added by
Yuriy Pershin
Publication date
2019
fields
Informatics Engineering
and research's language is
English
Authors
Y. V. Pershin
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Implication logic gates that are based on volatile memristors are demonstrated experimentally with the use of relay-based volatile memristor emulators of an original design. The fabricated logic circuit involves two volatile memristors and it is capable of performing four fundamental logic functions (two types of material implication and the negations thereof). Moreover, current-voltage characteristics of individual emulators are recorded and self-sustained oscillations in a resistor-volatile memristor circuit are found. The developed emulator offers a great potential for memristive circuit experiments because of its simplicity, similarity of response with volatile memristors, and low cost. Our findings, which are based on emulators, can easily be reproduced with physical volatile memristors and, thus, open up possibilities for emerging in-memory computing architectures.
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Monolithic three-dimensional integration of memory and logic circuits could dramatically improve performance and energy efficiency of computing systems. Some conventional and emerging memories are suitable for vertical integration, including highly scalable metal-oxide resistive switching devices (memristors), yet integration of logic circuits proves to be much more challenging. Here we demonstrate memory and logic functionality in a monolithic three-dimensional circuit by adapting recently proposed memristor-based stateful material implication logic. Though such logic has been already implemented with a variety of memory devices, prohibitively large device variability in the most prospective memristor-based circuits has limited experimental demonstrations to simple gates and just a few cycles of operations. By developing a low-temperature, low-variability fabrication process, and modifying the original circuit to increase its robustness to device imperfections, we experimentally show, for the first time, reliable multi-cycle multi-gate material implication logic operation within a three-dimensional stack of monolithically integrated memristors. The direct data manipulation in three dimensions enables extremely compact and high-throughput logic-in-memory computing and, remarkably, presents a viable solution for the Feynman grand challenge of implementing an 8-bit adder at the nanoscale.
The recently proposed probabilistic spin logic presents promising solutions to novel computing applications. Multiple cases of implementations, including invertible logic gate, have been studied numerically by simulations. Here we report an experimental demonstration of a magnetic tunnel junction-based hardware implementation of probabilistic spin logic.
Memtranstor that correlates charge and magnetic flux via nonlinear magnetoelectric effects has a great potential in developing next-generation nonvolatile devices. In addition to multi-level nonvolatile memory, we demonstrate here that nonvolatile logic gates such as NOR and NAND can be implemented in a single memtranstor made of the Ni/PMN-PT/Ni heterostructure. After applying two sequent voltage pulses (X1, X2) as the logic inputs on the memtranstor, the output magnetoelectric voltage can be positive high (logic 1), positive low (logic 0), or negative (logic 0), depending on the levels of X1 and X2. The underlying physical mechanism is related to the complete or partial reversal of ferroelectric polarization controlled by inputting selective voltage pulses, which determines the magnitude and sign of the magnetoelectric voltage coefficient. The combined functions of both memory and logic could enable the memtranstor as a promising candidate for future computing systems beyond von Neumann architecture.
Efficient simulation of probabilistic memristors and their networks requires novel modeling approaches. One major departure from the conventional memristor modeling is based on a master equation for the occupation probabilities of network states [arXiv:2003.11011 (2020)]. In the present article, we show how to implement such master equations in SPICE - a general-purpose circuit simulation program. In the case studies, we simulate the dynamics of ac-driven probabilistic binary and multi-state memristors, and dc-driven networks of probabilistic binary and multi-state memristors. Our SPICE results are in perfect agreement with known analytical solutions. Examples of LTspice codes are included.
An analog computer makes use of continuously changeable quantities of a system, such as its electrical, mechanical, or hydraulic properties, to solve a given problem. While these devices are usually computationally more powerful than their digital counterparts, they suffer from analog noise which does not allow for error control. We will focus on analog computers based on active electrical networks comprised of resistors, capacitors, and operational amplifiers which are capable of simulating any linear ordinary differential equation. However, the class of nonlinear dynamics they can solve is limited. In this work, by adding memristors to the electrical network, we show that the analog computer can simulate a large variety of linear and nonlinear integro-differential equations by carefully choosing the conductance and the dynamics of the memristor state variable. To the best of our knowledge, this is the first time that circuits based on memristors are proposed for simulations. We study the performance of these analog computers by simulating integro-differential models related to fluid dynamics, nonlinear Volterra equations for population growth, and quantum models describing non-Markovian memory effects, among others. Finally, we perform stability tests by considering imperfect analog components, obtaining robust solutions with up to $13%$ relative error for relevant timescales.
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