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Register a new userA microfabricated surface-electrode ion trap for scalable quantum information processing
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We demonstrate confinement of individual atomic ions in a radio-frequency Paul trap with a novel geometry where the electrodes are located in a single plane and the ions confined above this plane. This device is realized with a relatively simple fabrication procedure and has important implications for quantum state manipulation and quantum information processing using large numbers of ions. We confine laser-cooled Mg-24 ions approximately 40 micrometer above planar gold electrodes. We measure the ions motional frequencies and compare them to simulations. From measurements of the escape time of ions from the trap, we also determine a heating rate of approximately five motional quanta per millisecond for a trap frequency of 5.3 MHz.
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In this study, we report the first Cu-filled through silicon via (TSV) integrated ion trap. TSVs are placed directly underneath electrodes as vertical interconnections between ion trap and a glass interposer, facilitating the arbitrary geometry design with increasing electrodes numbers and evolving complexity. The integration of TSVs reduces the form factor of ion trap by more than 80%, minimizing parasitic capacitance from 32 to 3 pF. A low RF dissipation is achieved in spite of the absence of ground screening layer. The entire fabrication process is on 12-inch wafer and compatible with established CMOS back end process. We demonstrate the basic functionality of the trap by loading and laser-cooling single 88Sr+ ions. It is found that both heating rate (17 quanta/ms for an axial frequency of 300 kHz) and lifetime (~30 minutes) are comparable with traps of similar dimensions. This work pioneers the development of TSV-integrated ion traps, enriching the toolbox for scalable quantum computing.
We investigate a surface-mounted electrode geometry for miniature linear radio frequency Paul ion traps. The electrodes reside in a single plane on a substrate, and the pseudopotential minimum of the trap is located above the substrate at a distance on order of the electrodes lateral extent or separation. This architecture provides the possibility to apply standard microfabrication principles to the construction of multiplexed ion traps, which may be of particular importance in light of recent proposals for large-scale quantum computation based on individual trapped ions.
We characterise the performance of a surface-electrode ion chip trap fabricated using established semiconductor integrated circuit and micro-electro-mechanical-system (MEMS) microfabrication processes which are in principle scalable to much larger ion trap arrays, as proposed for implementing ion trap quantum information processing. We measure rf ion micromotion parallel and perpendicular to the plane of the trap electrodes, and find that on-package capacitors reduce this to <~ 10 nm in amplitude. We also measure ion trapping lifetime, charging effects due to laser light incident on the trap electrodes, and the heating rate for a single trapped ion. The performance of this trap is found to be comparable with others of the same size scale.
The prospect of building a quantum information processor underlies many recent advances ion trap fabrication techniques. Potentially, a quantum computer could be constructed from a large array of interconnected ion traps. We report on a micrometer-scale ion trap, fabricated from bulk silicon using micro-electromechanical systems (MEMS) techniques. The trap geometry is relatively simple in that the electrodes lie in a single plane beneath the ions. In such a trap we confine laser-cooled 24Mg+ ions approximately 40 microns above the surface. The fabrication technique and planar electrode geometry together make this approach amenable to scaling up to large trap arrays. In addition we observe that little laser cooling light is scattered by the electrodes.
We describe a novel monolithic ion trap that combines the flexibility and scalability of silicon microfabrication technologies with the superior trapping characteristics of traditional four-rod Paul traps. The performace of the proposed microfabricated trap approaches that of the macroscopic structures. The fabrication process creates an angled through-chip slot which allows backside ion loading and through-laser access while avoiding surface light scattering and dielectric charging. The trap geometry and dimensions are optimized for confining long ion chains with equal ion spacing [G.-D. Lin, et al., Europhys. Lett. 86, 60004 (2009)]. Control potentials have been derived to produce linear, equally spaced ion chains of up to 50 ions spaced at 10 um. With the deep trapping depths achievable in this design, we expect that these chains will be sufficiently long-lived to be used in quantum simulations of magnetic systems [E.E. Edwards, et al., Phys. Rev. B 82, 060412(R) (2010)]. The trap is currently being fabricated at Georgia Tech using VLSI techniques.
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