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Register a new userMaterials Requirements of High-Speed and Low-Power Spin-Orbit-Torque Magnetic Random-Access Memory
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As spin-orbit-torque magnetic random-access memory (SOT-MRAM) is gathering great interest as the next-generation low-power and high-speed on-chip cache memory applications, it is critical to analyze the magnetic tunnel junction (MTJ) properties needed to achieve sub-ns, and ~fJ write operation when integrated with CMOS access transistors. In this paper, a 2T-1MTJ cell-level modeling framework for in-plane type Y SOT-MRAM suggests that high spin Hall conductivity and moderate SOT material sheet resistance are preferred. We benchmark write energy and speed performances of type Y SOT cells based on various SOT materials experimentally reported in the literature, including heavy metals, topological insulators and semimetals. We then carry out detailed benchmarking of SOT material Pt, beta-W, and BixSe(1-x) with different thickness and resistivity. We further discuss how our 2T-1MTJ model can be expanded to analyze other variations of SOT-MRAM, including perpendicular (type Z) and type X SOT-MRAM, two-terminal SOT-MRAM, as well as spin-transfer-torque (STT) and voltage-controlled magnetic anisotropy (VCMA)-assisted SOT-MRAM. This work will provide essential guidelines for SOT-MRAM materials, devices, and circuits research in the future.
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Voltage-gate assisted spin-orbit torque (VGSOT) writing scheme combines the advantages from voltage control of magnetic anisotropy (VCMA) and spin-orbit torque (SOT) effects, enabling multiple benefits for magnetic random access memory (MRAM) applications. In this work, we give a complete description of VGSOT writing properties on perpendicular magnetic tunnel junction (pMTJ) devices, and we propose a detailed methodology for its electrical characterization. The impact of gate assistance on the SOT switching characteristics are investigated using electrical pulses down to 400ps. The VCMA coefficient ({xi}) extracted from current switching scheme is found to be the same as that from the magnetic field switch method, which is in the order of 15fJ/Vm for the 80nm to 150nm devices. Moreover, as expected from the pure electronic VCMA effect, {xi} is revealed to be independent of the writing speed and gate length. We observe that SOT switching current characteristics are modified linearly with gate voltage (V_g), similar as for the magnetic properties. We interpret this linear behavior as the direct modification of perpendicular magnetic anisotropy (PMA) and nucleation energy induced by VCMA. At V_g = 1V, the SOT write current is decreased by 25%, corresponding to a 45% reduction in total energy down to 30fJ/bit at 400ps speed for the 80nm devices used in this study. Further, the device-scaling criteria are proposed, and we reveal that VGSOT scheme is of great interest as it can mitigate the complex material requirements of achieving high SOT and VCMA parameters for scaled MTJs. Finally, how that VGSOT-MRAM can enable high-density arrays close to two terminal geometries, with high-speed performance and low-power operation, showing great potential for embedded memories as well as in-memory computing applications at advanced technology nodes.
Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is an attractive alternative to current random access memory technologies due to its non-volatility, fast operation and high endurance. STT-MRAM does though have limitations including the stochastic nature of the STT-switching and a high critical switching current, which makes it unsuitable for ultrafast operation at nanosecond and sub-nanosecond regimes. Spin-orbit torque (SOT) switching, which relies on the torque generated by an in-plane current, has the potential to overcome these limitations. However, SOT-MRAM cells studied so far use a three-terminal structure in order to apply the in-plane current, which increases the size of the cells. Here we report a two-terminal SOT-MRAM cell based on a CoFeB/MgO magnetic tunnel junction pillar on an ultrathin and narrow Ta underlayer. In this device, an in-plane and out-of-plane current are simultaneously generated upon application of a voltage, and we demonstrate that the switching mechanism is dominated by SOT. We also compare our device to a STT-MRAM cell built with the same architecture and show that critical write current in the SOT-MRAM cell is reduced by more than 70%.
Reducing energy dissipation while increasing speed in computation and memory is a long-standing challenge for spintronics research. In the last 20 years, femtosecond lasers have emerged as a tool to control the magnetization in specific magnetic materials at the picosecond timescale. However, the use of ultrafast optics in integrated circuits and memories would require a major paradigm shift. An ultrafast electrical control of the magnetization is far preferable for integrated systems. Here we demonstrate reliable and deterministic control of the out-of-plane magnetization of a 1 nm-thick Co layer with single 6 ps-wide electrical pulses that induce spin-orbit torques on the magnetization. We can monitor the ultrafast magnetization dynamics due to the spin-orbit torques on sub-picosecond timescales, thus far accessible only by numerical simulations. Due to the short duration of our pulses, we enter a counter-intuitive regime of switching where heat dissipation assists the reversal. Moreover, we estimate a low energy cost to switch the magnetization, projecting to below 1fJ for a (20 nm)^3 cell. These experiments prove that spintronic phenomena can be exploited on picosecond time-scales for full magnetic control and should launch a new regime of ultrafast spin torque studies and applications.
Spin-orbit torque (SOT) can drive sustained spin wave (SW) auto-oscillations in a class of emerging microwave devices known as spin Hall nano-oscillators (SHNOs), which have highly non-linear properties governing robust mutual synchronization at frequencies directly amenable to high-speed neuromorphic computing. However, all demonstrations have relied on localized SW modes interacting through dipolar coupling and/or direct exchange. As nanomagnonics requires propagating SWs for data transfer, and additional computational functionality can be achieved using SW interference, SOT driven propagating SWs would be highly advantageous. Here, we demonstrate how perpendicular magnetic anisotropy can raise the frequency of SOT driven auto-oscillations in magnetic nano-constrictions well above the SW gap, resulting in the efficient generation of field and current tunable propagating SWs. Our demonstration greatly extends the functionality and design freedom of SHNOs enabling long range SOT driven SW propagation for nanomagnonics, SW logic, and neuro-morphic computing, directly compatible with CMOS technology.
This paper introduces the concept of spin-orbit-torque-MRAM (SOT-MRAM) based physical unclonable function (PUF). The secret of the PUF is stored into a random state of a matrix of perpendicular SOT-MRAMs. Here, we show experimentally and with micromagnetic simulations that this random state is driven by the intrinsic nonlinear dynamics of the free layer of the memory excited by the SOT. In detail, a large enough current drives the magnetization along an in-plane direction. Once the current is removed, the in-plane magnetic state becomes unstable evolving towards one of the two perpendicular stable configurations randomly. In addition, an hybrid CMOS/spintronics model is used to evaluate the electrical characteristics of a PUF realized with an array of 16x16 SOT-MRAM cells. Beyond robustness against voltage and temperature variations, hardware authentication based on this PUF scheme has additional advantages over other PUF technologies such as non-volatility (no power consumption in standby mode), reconfigurability (the secret can be rewritten), and scalability. We believe that this work is a step forward the design of spintronic devices for application in security.
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