Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userFront-end electronic readout system for the Belle II imaging Time-Of-Propagation detector
317
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
The Time-Of-Propagation detector is a Cherenkov particle identification detector based on quartz radiator bars for the Belle II experiment at the SuperKEKB electron-positron collider. The purpose of the detector is to identify the type of charged hadrons produced in electron-positron collisions, and requires a single photon timing resolution below 100 picoseconds. A novel front-end electronic system was designed, built, and integrated to acquire data from the 8192 microchannel plate photomultiplier tube channels in the detector. Waveform sampling of these analog signals is done by switched-capacitor array application-specific integrated circuits. The processes of triggering, digitization of windows of interest, readout, and data transfer to the Belle II data acquisition system are managed by Xilinx Zynq-7000 programmable system on a chip devices.
rate research
Read More
We present an FPGA-based online data reduction system for the pixel detector of the future Belle II experiment. The occupancy of the pixel detector is estimated at 3 %. This corresponds to a data output rate of more than 20 GB/s after zero suppression, dominated by background. The Online Selection Nodes (ONSEN) system aims to reduce the background data by a factor of 30. It consists of 33 MicroTCA cards, each equipped with a Xilinx Virtex-5 FPGA and 4 GiB DDR2 RAM. These cards are hosted by 9 AdvancedTCA carrier boards. The ONSEN system buffers the entire output data from the pixel detector for up to 5 seconds. During this time, the Belle II high-level trigger PC farm performs an online event reconstruction, using data from the other Belle II subdetectors. It extrapolates reconstructed tracks to the layers of the pixel detector and defines regions of interest around the intercepts. Based on this information, the ONSEN system discards all pixels not inside a region of interest before sending the remaining hits to the event builder system. During a beam test with one layer of the pixel detector and four layers of the surrounding silicon strip detector, including a scaled-down version of the high-level trigger and data acquisition system, the pixel data reduction using regions of interest was exercised. We investigated the data produced in more than 20 million events and verified that the ONSEN system behaved correctly, forwarding all pixels inside regions of interest and discarding the rest.
We describe a novel high-speed front-end electronic board (FEB) for interfacing an array of 32 Silicon Photo-multipliers (SiPM) with a computer. The FEB provides individually adjustable bias on the SiPMs, and performs low-noise analog signal amplification, conditioning and digitization. It provides event timing information accurate to 1.3 ns RMS. The back-end data interface is realized on the basis of 100 Mbps Ethernet. The design allows daisy-chaining of up to 256 units into one network interface, thus enabling compact and efficient readout schemes for multi-channel scintillating detectors, using SiPMs as photo-sensors.
The Time-Of-Propagation (TOP) counter is a novel device for particle identification for the barrel region of the Belle II experiment, where, information of Cherenkov light propagation time is used to reconstruct its ring image. We successfully finished the detector production and installation to the Belle II structure in 2016. Commissioning of the installed detector has been on going, where the detector operation in the 1.5-T magnetic field was studied. Although we found a problem where photomultipliers were mechanically moved due to the magnetic force, it was immediately fixed. Performance was evaluated with cosmic ray data, the number of photon hits were confirmed to be consistent with simulation within 15-30%.
The Belle II experiment at the SuperKEKB collider at KEK, Tsukuba, Japan has successfully started taking data with the full detector in March 2019. Belle II is a luminosity frontier experiment of the new generation to search for physics beyond the Standard Model of elementary particles, from precision measurements of a huge number of B and charm mesons and tau leptons. In order to read out the events at a high rate from the seven subdetectors of Belle II, we adopt a highly unified readout system, including a unified trigger timing distribution system (TTD), a unified high speed data link system (Belle2link), and a common backend system to receive Belle2link data. Each subdetector frontend readout system has a field-programmable gate array (FPGA) in which unified firmware components of the TTD receiver and Belle2link transmitter are embedded. The system is designed for data taking at a trigger rate up to 30 kHz with a dead-time fraction of about 1% in the frontend readout system. The trigger rate is still much lower than our design. However, the background level is already high due to the initial vacuum condition and other accelerator parameters, and it is the most limiting factor of the accelerator and detector operation. Hence the occupancy and radiation effects to the frontend electronics are rather severe, and they cause various kind of instabilities. We present the performance of the system, including the achieved trigger rate, dead-time fraction, stability, and discuss the experience gained during the operation.
The water Cherenkov detector array (WCDA) is one of the key detectors in the large high altitude air shower observatory (LHAASO), which is proposed for very high gamma ray source survey. In WCDA, there are more than 3000 photomultiplier tubes (PMTs) scattered under water in an area of 80000 m2. As for the WCDA readout electronics, both high precision time and charge measurement is required over a large dynamic range from 1 photon electron (P.E.) to 4000 P.E. To reduce the electronics complexity and improve the system reliability, a readout scheme based on application specific integrated circuits (ASICs) is proposed. Two prototype ASICs were designed and tested. The first ASIC integrates amplification and shaping circuits for charge measurement and discrimination circuits used for time measurement. The shaped signal is further fed to the second ADC ASIC, while the output signal from the discriminator is digitized by the FPGA-based time-to-digital converter (TDC). Test results indicate that time resolution is better than 250 ps RMS, and the charge resolution is better than 10% at 1 P.E., and 1% at 4000 P.E. which meets the requirements of the LHAASO WCDA.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
