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Register a new userDesign Rules for High Performance Tunnel Transistors from 2D Materials
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Added by
Hesameddin Ilatikhameneh
Publication date
2016
fields
Physics
and research's language is
English
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Tunneling field-effect transistors (TFETs) based on 2D materials are promising steep sub-threshold swing (SS) devices due to their tight gate control. There are two major methods to create the tunnel junction in these 2D TFETs: electrical and chemical doping. In this work, design guidelines for both electrically and chemically doped 2D TFETs are provided using full band atomistic quantum transport simulations in conjunction with analytic modeling. Moreover, several 2D TFETs performance boosters such as strain, source doping, and equivalent oxide thickness (EOT) are studied. Later on, these performance boosters are analyzed within a novel figure-of-merit plot (i.e. constant ON-current plot).
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We report a new strategy for fabricating 2D/2D low-resistance ohmic contacts for a variety of transition metal dichalcogenides (TMDs) using van der Waals assembly of substitutionally doped TMDs as drain/source contacts and TMDs with no intentional doping as channel materials. We demonstrate that few-layer WSe2 field-effect transistors (FETs) with 2D/2D contacts exhibit low contact resistances of ~ 0.3 k ohm.um, high on/off ratios up to > 109, and high drive currents exceeding 320 uA um-1. These favorable characteristics are combined with a two-terminal field-effect hole mobility ~ 2x102 cm2 V-1 s-1 at room temperature, which increases to >2x103 cm2 V-1 s-1 at cryogenic temperatures. We observe a similar performance also in MoS2 and MoSe2 FETs with 2D/2D drain and source contacts. The 2D/2D low-resistance ohmic contacts presented here represent a new device paradigm that overcomes a significant bottleneck in the performance of TMDs and a wide variety of other 2D materials as the channel materials in post-silicon electronics.
This work reports the design and analysis of an n-type tunneling field effect transistor based on InN. The tunneling current is evaluated from the fundamental principles of quantum mechanical tunneling and semiclassical carrier transport. We investigate the RF performance of the device. High transconductance of 2 mS/um and current gain cut-off frequency of around 460 GHz makes the device suitable for THz applications. A significant reduction in gate to drain capacitance is observed under relatively higher drain bias. In this regard, the avalanche breakdown phenomenon in highly doped InN junctions is analyzed quantitatively for the first time and is compared to that of Si and InAs.
When biased at a voltage just below a superconductors energy gap, a tunnel junction between this superconductor and a normal metal cools the latter. While the study of such devices has long been focussed to structures of submicron size and consequently cooling power in the picoWatt range, we have led a thorough study of devices with a large cooling power up to the nanoWatt range. Here we describe how their performance can be optimized by using a quasi-particle drain and tuning the cooling junctions tunnel barrier.
The main promise of tunnel FETs (TFETs) is to enable supply voltage ($V_{DD}$) scaling in conjunction with dimension scaling of transistors to reduce power consumption. However, reducing $V_{DD}$ and channel length ($L_{ch}$) typically deteriorates the ON- and OFF-state performance of TFETs, respectively. Accordingly, there is not yet any report of a high perfor]mance TFET with both low V$_{DD}$ ($sim$0.2V) and small $L_{ch}$ ($sim$6nm). In this work, it is shown that scaling TFETs in general requires scaling down the bandgap $E_g$ and scaling up the effective mass $m^*$ for high performance. Quantitatively, a channel material with an optimized bandgap ($E_gsim1.2qV_{DD} [eV]$) and an engineered effective mass ($m*^{-1}sim40 V_{DD}^{2.5} [m_0^{-1}]$) makes both $V_{DD}$ and $L_{ch}$ scaling feasible with the scaling rule of $L_{ch}/V_{DD}=30~nm/V$ for $L_{ch}$ from 15nm to 6nm and corresponding $V_{DD}$ from 0.5V to 0.2V.
In this article, a novel two-path model is proposed to quantitatively explain sub-threshold characteristics of back-gated Schottky barrier FETs (SB-FETs) from 2D channel materials. The model integrates the conventional model for SB-FETs with the phenomenon of contact gating - an effect that significantly affects the carrier injection from the source electrode in back-gated field effect transistors. The two-path model is validated by a careful comparison with experimental characteristics obtained from a large number of back-gated WSe2 devices with various channel thicknesses. Our findings are believed to be of critical importance for the quantitative analysis of many three-terminal devices with ultrathin body channels.
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