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Register a new userWafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics
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Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain > 1.0 in vacuum (pressure < 2 x 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 inch wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.
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Preparing graphene and its derivatives on functional substrates may open enormous opportunities for exploring the intrinsic electronic properties and new functionalities of graphene. However, efforts in replacing SiO$_{2}$ have been greatly hampered by a very low sample yield of the exfoliation and related transferring methods. Here, we report a new route in exploring new graphene physics and functionalities by transferring large-scale chemical vapor deposition single-layer and bilayer graphene to functional substrates. Using ferroelectric Pb(Zr$_{0.3}$Ti$_{0.7}$)O$_{3}$ (PZT), we demonstrate ultra-low voltage operation of graphene field effect transistors within $pm1$ V with maximum doping exceeding $10^{13},mathrm{cm^{-2}}$ and on-off ratios larger than 10 times. After polarizing PZT, switching of graphene field effect transistors are characterized by pronounced resistance hysteresis, suitable for ultra-fast non-volatile electronics.
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