اشترك بالحزمة الذهبية واحصل على وصول غير محدود شمرا أكاديميا
تسجيل مستخدم جديدInterlayer-Exciton Based Nonvolatile Valleytronic Memory
303
0
0.0
(
0
)
اسأل ChatGPT حول البحث
ﻻ يوجد ملخص باللغة العربية
Analogous to conventional charge-based electronics, valleytronics aims at encoding data via the valley degree of freedom, enabling new routes for information processing. Long-lived interlayer excitons (IXs) in van der Waals heterostructures (HSs) stacked by transition metal dichalcogenides (TMDs) carry valley-polarized information and thus could find promising applications in valleytronic devices. Although great progress of studies on valleytronic devices has been achieved, nonvolatile valleytronic memory, an indispensable device in valleytronics, is still lacking up to date. Here, we demonstrate an IX-based nonvolatile valleytronic memory in a WS2/WSe2 HS. In this device, the emission characteristics of IXs exhibit a large excitonic/valleytronic hysteresis upon cyclic-voltage sweeping, which is ascribed to the chemical-doping of O2/H2O redox couple trapped between the TMDs and substrate. Taking advantage of the large hysteresis, the first nonvolatile valleytronic memory has been successfully made, which shows a good performance with retention time exceeding 60 minutes. These findings open up an avenue for nonvolatile valleytronic memory and could stimulate more investigations on valleytronic devices.
قيم البحث
اقرأ أيضاً
Development of memory devices with ultimate performance has played a key role in innovation of modern electronics. As a mainstream technology nonvolatile memory devices have manifested high capacity and mechanical reliability, however current major b
ottlenecks include low extinction ratio and slow operational speed. Although substantial effort has been employed to improve their performance, a typical hundreds of micro- or even milli- second write time remains a few orders of magnitude longer than their volatile counterparts. We have demonstrated nonvolatile, floating-gate memory devices based on van der Waals heterostructures with atomically sharp interfaces between different functional elements, and achieved ultrahigh-speed programming/erasing operations verging on an ultimate theoretical limit of nanoseconds with extinction ratio up to 10^10. This extraordinary performance has allowed new device capabilities such as multi-bit storage, thus opening up unforeseen applications in the realm of modern nanoelectronics and offering future fabrication guidelines for device scale-up.
The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories hav
e been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient ({alpha}) of multiferroics. Because the states of {alpha} depends on the relative orientation between magnetization and polarization, one can reach different levels of {alpha} by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of {alpha} can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of {alpha} is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.
Non-volatile resistive switching is demonstrated in memristors with nanocrystalline molybdenum disulfide (MoS$_2$) as the active material. The vertical heterostructures consist of silicon, vertically aligned MoS$_2$ and chrome / gold metal electrodes
. Electrical characterizations reveal a bipolar and forming free switching process with stable retention for at least 2500 seconds. Controlled experiments carried out in ambient and vacuum conditions suggest that the observed resistive switching is based on hydroxyl ions (OH$^-$). These originate from catalytic splitting of adsorbed water molecules by MoS$_2$. Experimental results in combination with analytical simulations further suggest that electric field driven movement of the mobile OH$^-$ ions along the vertical MoS$_2$ layers influences the energy barrier at the Si/MoS$_2$ interface. The scalable and semiconductor production compatible device fabrication process used in this work offers the opportunity to integrate such memristors into existing silicon technology for future neuromorphic applications. The observed ion-based plasticity may be exploited in ionicelectronic devices based on TMDs and other 2D materials for memristive applications.
Reconfigurability of photonic integrated circuits (PICs) has become increasingly important due to the growing demands for electronic-photonic systems on a chip driven by emerging applications, including neuromorphic computing, quantum information, an
d microwave photonics. Success in these fields usually requires highly scalable photonic switching units as essential building blocks. Current photonic switches, however, mainly rely on materials with weak, volatile thermo-optic or electro-optic modulation effects, resulting in a large footprint and high energy consumption. As a promising alternative, chalcogenide phase-change materials (PCMs) exhibit strong modulation in a static, self-holding fashion. Here, we demonstrate nonvolatile electrically reconfigurable photonic switches using PCM-clad silicon waveguides and microring resonators that are intrinsically compact and energy-efficient. With phase transitions actuated by in-situ silicon PIN heaters, near-zero additional loss and reversible switching with high endurance are obtained in a complementary metal-oxide-semiconductor (CMOS)-compatible process. Our work can potentially enable very large-scale general-purpose programmable integrated photonic processors.
A new spintronic nonvolatile memory cell analogous to 1T DRAM with non-destructive read is proposed. The cells can be used as neural computing units. A dual-circuit neural network architecture is proposed to leverage these devices against the complex
operations involved in convolutional networks. Simulations based on HSPICE and Matlab were performed to study the performance of this architecture when classifying images as well as the effect of varying the size and stability of the nanomagnets. The spintronic cells outperform a purely charge-based implementation of the same network, consuming about 100 pJ total per image processed.
سجل دخول لتتمكن من نشر تعليقات
التعليقات
جاري جلب التعليقات
سجل دخول لتتمكن من متابعة معايير البحث التي قمت باختيارها
