ﻻ يوجد ملخص باللغة العربية
For the first time the quantum dots CsPbX_3 (X=Cl, Br, I) in the fluorophosphate glasses were prepared. The samples were precipitated by two methods:(i) through self-crystallization during cooling of the glass melt and (ii) heat treatment of the glass. Controlled formation of CsPbX_3 quantum dots was realized by adjustment of cooling rate and heat-treatment conditions. The X-ray diffraction data was confirmed CsPbCl_3(Br_3, I_3) quantum dots formation. It was shown that, CsPbX_3 (X=Cl, I) quantum dots are formed in a cubic modification, while CsPbBr_3 in orthorhombic one. The photoluminescence of quantum dots have high intensity with quantum yield 45-50% and narrow band emission. The combined introduction of two anions (Cl/Br and Br/I) led to the simultaneous formation of two types of quantum dots, and indicates the difficulty of the anion exchange.
Dark ground state exciton in semiconductor nanocrystals has been a subject of much interest due to its long lifetime attractive for applications requiring long-lived electronic or spin states. Significant effort has been made recently to explore and
We report an optical homogeneous linewidth of 580 $pm$ 20 Hz of Er$^{3+}$:Y$_2$O$_3$ ceramics at millikelvin temperatures, narrowest so far in rare-earth doped ceramics. We show slow spectral diffusion of $sim$2 kHz over a millisecond time scale. Tem
Fully-inorganic cesium lead halide perovskite nanocrystals (NCs) have shown to exhibit outstanding optical properties such as wide spectral tunability, high quantum yield, high oscillator strength as well as blinking-free single photon emission and l
Sufficiently large depletion region for photocarrier generation and separation is a key factor for two-dimensional material optoelectronic devices, but few device configurations has been explored for a deterministic control of a space charge region a
We present an improved fabrication process for overlapping aluminum gate quantum dot devices on Si/SiGe heterostructures that incorporates low-temperature inter-gate oxidation, thermal annealing of gate oxide, on-chip electrostatic discharge (ESD) pr