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تسجيل مستخدم جديدAn sTGC Prototype Readout System for ATLAS New-Small-Wheel Upgrade
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This paper presents a readout system designed for testing the prototype of Small-Strip Thin Gap Chamber (sTGC), which is one of the main detector technologies used for ATLAS New-Small-Wheel Upgrade. This readout system aims at testing one full-size sTGC quadruplet with cosmic muon triggers.
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The instantaneous luminosity of the Large Hadron Collider at CERN will be increased up to a factor of five with respect to the present design value by undergoing an extensive upgrade program over the coming decade. The most important upgrade project
for the ATLAS Muon System is the replacement of the present first station in the forward regions with the so-called New Small Wheels (NSWs). The NSWs will be installed during the LHC long shutdown in 2018/19. Small-Strip Thin Gap Chamber (sTGC) detectors are designed to provide fast trigger and high precision muon tracking under the high luminosity LHC conditions. To validate the design, a full-size prototype sTGC detector of approximately 1.2 $times$ $1.0, mathrm{m}^2$ consisting of four gaps has been constructed. Each gap provides pad, strip and wire readouts. The sTGC intrinsic spatial resolution has been measured in a $32, mathrm{GeV}$ pion beam test at Fermilab. At perpendicular incidence angle, single gap position resolutions of about $50,mathrm{mu m}$ have been obtained, uniform along the sTGC strip and perpendicular wire directions, well within design requirements. Pad readout measurements have been performed in a $130, mathrm{GeV}$ muon beam test at CERN. The transition region between readout pads has been found to be $4,mathrm{mm}$, and the pads have been found to be fully efficient.
Following the Higgs particle discovery, the Large Hadron Collider complex will be upgraded in several phases allowing the luminosity to increase to $7 times 10^{34}cm^{-2}s^{-1}$. In order to adapt the ATLAS detector to the higher luminosity environm
ent after the upgrade, part of the ATLAS muon end-cap system, the Small Wheel, will be replaced by the New Small Wheel. The New Small Wheel includes two kinds of detectors: small-strip Thin Gap Chambers and Micromegas. Shandong University, part of the ATLAS collaboration, participates in the construction of the ATLAS New Small Wheel by developing, producing and testing the performance of part of the small-strip Thin Gap Chambers. This paper describes the construction and cosmic-ray testing of small-strip Thin Gap Chambers in Shandong University.
The MicroMegas technology was selected by the ATLAS experiment at CERN to be adopted for the Small Wheel upgrade of the Muon Spectrometer, dedicated to precision tracking, in order to meet the requirements of the upcoming luminosity upgrade of the La
rge Hadron Collider. A large surface of the forward regions of the Muon Spectrometer will be equipped with 8 layers of MicroMegas modules forming a total active area of $1200,m^{2}$. The New Small Wheel is scheduled to be installed in the forward region of $1.3<vert eta vert <2.7$ of the ATLAS detector during the second long shutdown of the Large Hadron Collider. The New Small Wheel will have to operate in a high background radiation environment, while reconstructing muon tracks as well as furnishing information for the Level-1 trigger. The project requires fully efficient MicroMegas chambers with spatial resolution down to $100,{mu}m$, a rate capability up to about $15,kHz/cm^{2}$ and operation in a moderate (highly inhomogeneous) magnetic field up to $B=0.3,T$. The required tracking is linked to the intrinsic spatial resolution in combination with the demanding mechanical accuracy. An overview of the design, construction and assembly procedures of the MicroMegas modules will be reported.
A completely New Small Wheel (NSW) will be constructed for ATLAS Phase-1 upgrade. Small-Strip Thin-Gap-Chamber (sTGC) will devote to the trigger function of NSW. A full-size sTGC quadruplet consists of 4 layers, and will need 4 pad Front-End-Boards a
nd 4 strip Front-End-Boards for sTGC signals readout. The 8 boards should be readout simultaneously at a time. This paper presents the study of multi-layer sTGC test system, a FEB Driver Card (FEBDC) is designed for pFEB and sFEB boards handling. The design and test of FEBDC are described in details.
The Address in Real Time Data Driver Card (ADDC) is designed to transmit the trigger data in the Micromegas detector of the ATLAS New Small Wheel (NSW) upgrade. The ART signals are generated by the front end ASIC, named VMM chip, to indicate the addr
ess of the first above-threshold event. A custom ASIC (ART ASIC) is designed to receive the ART signals from the VMM chip and do the hit-selection processing. Processed data from ART ASIC will be transmitted out of the NSW detector through GBTx serializer, VTTx optical transmitter module and fiber optical links. The ART signal is critical for the ATLAS experiment trigger selection thus the functionality and stability of the ADDC is very important. To ensure extensive testing of the ADDC, an FMC based testing platform and special firmware/software are developed. This test platform works with the commercial Xilinx VC707 FPGA develop kit, even without the other electronics of the NSW it can test all the functionality of the ADDC and also long term stability. This paper will introduce the design, testing procedure and results from the ADDC and the FMC testing platform.
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