اشترك بالحزمة الذهبية واحصل على وصول غير محدود شمرا أكاديميا
تسجيل مستخدم جديدFPGA Based Pico-second Time Measurement System for a DIRC-like TOF Detector
69
0
0.0
(
0
)
اسأل ChatGPT حول البحث
ﻻ يوجد ملخص باللغة العربية
A prototype of DIRC-like Time-of-Flight detector (DTOF), including a pico-second time measurement electronics, is developed and tested preliminarily. The basic structure of DTOF is composed of a fused silica radiator connected to fast micro-channel plate PMTs (MCP-PMT), and readout by a dedicated FPGA (Field Programmable Gate Array) based front-end electronics. The full electronics chain consists of a programmable differential amplifier, a dual-threshold differential discriminator, and a timestamp Time-to-Digital convertor. By splitting a MCP-PMT output signal into two identical electronics chains, the coincidence time resolution (CTR) of pure electronics was measured as 5.6 ps. By the beam test in H4 (150GeV/c, Muon) at CERN, the intrinsic CTR of the whole detector prototype reaches 15.0 ps without using time-amplitude correction. The test results demonstrate that the FPGA based front-end electronics could achieve an excellent time performance for TOF detectors. It is very compact, cost effective with a high multi-channel capacity and short measurement dead time, which is very suitable for practical applications of large-scale high performance TOF detectors in particle physics spectrometer.
قيم البحث
اقرأ أيضاً
A high-performance time-of-flight (TOF) MRPC wall is being built for the CBM experiment at FAIR for charged hadron identification. The detector control system for the TOF system will be based on EPICS. All components like power supplies for low and h
igh voltages, power distribution boxes, gas control and front-end electronics (FEE) are controlled and monitored. In a test, called mini-CBM, all these functionalities are implemented and tested. For monitoring the detector environment and the status of the front-end electronics, a slow control application is implemented based on IPbus, which is an FPGA-based slow control bus used for the TOF data acquisition system. In addition to the functions of control and monitoring, exception handling and data archiving services are implemented as well. This system has been fully verified in beam tests in 2019 at GSI.
The Super Tau-Charm Facility (STCF) is a future electron-positron collider proposed in China with a peak luminosity of above 0.5$times$10$^{35}$ cm$^{-2}$s$^{-1}$ and center-of-mass energy ranging from 2 to 7 GeV. An excellent particle identification
(PID) capability is one of the most important requirements for the detector at the STCF. A 3$sigma$ $pi$/K separation power at the momentum of up to 2 GeV/c is required within the detector acceptance. A DIRC-like time-of-flight (DTOF) detector is proposed to meet the PID requirement for the endcap region of the STCF. The conceptual design of the DTOF detector and its geometry optimization is herein presented. The PID performance of the detector is studied using Geant4 simulation. With a proper reconstruction algorithm, an overall time resolution of ~50 ps is achieved for the detector with an optimum geometry when convoluting contributions from all other sources, including the transit time spread (TTS) of the photodetector, electronic timing accuracy, and an assumed precision (~40 ps) of the event start time. A $pi$/K separation power of better than 4$sigma$ at the momentum of 2 GeV/c is achieved over the entire sensitive area of the DTOF detector, thereby fulfilling the physics requirement of the PID detector for the experiment at the STCF.
In this article it is presented an FPGA based $M$ulti-$V$oltage $T$hreshold (MVT) system which allows of sampling fast signals ($1-2$ ns rising and falling edge) in both voltage and time domain. It is possible to achieve a precision of time measureme
nt of $20$ ps RMS and reconstruct charge of signals, using a simple approach, with deviation from real value smaller than 10$%$. Utilization of the differential inputs of an FPGA chip as comparators together with an implementation of a TDC inside an FPGA allowed us to achieve a compact multi-channel system characterized by low power consumption and low production costs. This paper describes realization and functioning of the system comprising 192-channel TDC board and a four mezzanine cards which split incoming signals and discriminate them. The boards have been used to validate a newly developed Time-of-Flight Positron Emission Tomography system based on plastic scintillators. The achieved full system time resolution of $sigma$(TOF) $approx 68$ ps is by factor of two better with respect to the current TOF-PET systems.
A fully digital beam position and phase measurement (BPPM) system was designed for the linear accelerator (LINAC) in Accelerator Driven Sub-critical System (ADS) in China. Phase information is obtained from the summed signals from four pick-ups of th
e Beam Position Monitor (BPM). Considering that the delay variations of different analog circuit channels would introduce phase measurement errors, we propose a new method to tune the digital waveforms of four channels before summation and achieve real-time error correction. The process is based on the vector rotation method and implemented within one single Field Programmable Gate Array (FPGA) device. Tests were conducted to evaluate this correction method and the results indicate that a phase correction precision better than +/- 0.3 degree over the dynamic range from -60 dBm to 0 dBm is achieved.
In this contribution we present a new concept of the large acceptance detector systems based on organic scintillators which may allow for simultaneous diagnostic of large fraction of the human body. Novelty of the concept lies in employing large bloc
ks of polymer scintillators instead of crystals as detectors of annihilation quanta, and in using predominantly the timing of signals instead of their amplitudes.
سجل دخول لتتمكن من نشر تعليقات
التعليقات
جاري جلب التعليقات
سجل دخول لتتمكن من متابعة معايير البحث التي قمت باختيارها
