ترغب بنشر مسار تعليمي؟ اضغط هنا

Exploiting OxRAM Resistive Switching for Dynamic Range Improvement of CMOS Image Sensors

71   0   0.0 ( 0 )
 نشر من قبل Ashwani Kumar
 تاريخ النشر 2017
  مجال البحث الهندسة المعلوماتية
والبحث باللغة English




اسأل ChatGPT حول البحث

We present a unique application of OxRAM devices in CMOS Image Sensors (CIS) for dynamic range (DR) improvement. We propose a modified 3T-APS (Active Pixel Sensor) circuit that incorporates OxRAM in 1T-1R configuration. DR improvement is achieved by resistive compression of the pixel output signal through autonomous programming of OxRAM device resistance during exposure. We show that by carefully preconditioning the OxRAM resistance, pixel DR can be enhanced. Detailed impact of OxRAM SET-to-RESET and RESET-to-SET transitions on pixel DR is discussed. For experimental validation with specific OxRAM preprogrammed states, a 4 Kb 10 nm thick HfOx (1T-1R) matrix was fabricated and characterized. Best case, relative pixel DR improvement of ~ 50 dB was obtained for our design.



قيم البحث

اقرأ أيضاً

192 - E. Linn , A. Siemon , R. Waser 2014
Highly accurate and predictive models of resistive switching devices are needed to enable future memory and logic design. Widely used is the memristive modeling approach considering resistive switches as dynamical systems. Here we introduce three eva luation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently non-linearity of the switching kinetics, and the feasibility of predicting the behavior of two anti-serially connected devices correctly. We analyzed two classes of models: the first class comprises common linear memristor models and the second class widely used non-linear memristive models. The linear memristor models are based on Strukovs initial memristor model extended by different window functions, while the non-linear models include Picketts physics-based memristor model and models derived thereof. This study reveals lacking predictivity of the first class of models, independent of the applied window function. Only the physics-based model is able to fulfill most of the basic evaluation criteria.
Uncertainty plays a key role in real-time machine learning. As a significant shift from standard deep networks, which does not consider any uncertainty formulation during its training or inference, Bayesian deep networks are being currently investiga ted where the network is envisaged as an ensemble of plausible models learnt by the Bayes formulation in response to uncertainties in sensory data. Bayesian deep networks consider each synaptic weight as a sample drawn from a probability distribution with learnt mean and variance. This paper elaborates on a hardware design that exploits cycle-to-cycle variability of oxide based Resistive Random Access Memories (RRAMs) as a means to realize such a probabilistic sampling function, instead of viewing it as a disadvantage.
95 - D.-L. Pohl 2017
Pixel sensors using 8 CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation to fluences up to 1.1 $times$ 10$^{15}$ n$_{rm eq}$ cm$^{-2}$. The CMOS-fabricated sensors perform equally well as standard pixel sensors in terms of noise and hit detection efficiency. AC-coupled sensors even reach 100% hit efficiency in a 3.2 GeV electron beam before irradiation.
Silicon photomultipliers are photon-number-resolving detectors endowed with hundreds of cells enabling them to reveal high-populated quantum optical states. In this paper, we address such a goal by showing the possible acquisition strategies that can be adopted and discussing their advantages and limitations. In particular, we determine the best acquisition solution in order to properly reveal the nature, either classical or nonclassical, of mesoscopic quantum optical states.
The search for a compatible application of memristor-CMOS logic gates has remained elusive, as the data density benefits are offset by slow switching speeds and resistive dissipation. Active microdisplays typically prioritize pixel density (and there fore resolution) over that of speed, where the most widely used refresh rates fall between 25-240 Hz. Therefore, memristor-CMOS logic is a promising fit for peripheral IO logic in active matrix displays. In this paper, we design and implement a ternary 1-3 line decoder and a ternary 2-9 line decoder which are used to program a seven segment LED display. SPICE simulations are conducted in a 50-nm process, and the decoders are synthesized on an Altera Cyclone IV field-programmable gate array (FPGA) development board which implements a ternary memristor model designed in Quartus II. We compare our hardware results to a binary coded decimal (BCD)-to-seven segment display decoder, and show our memristor-CMOS approach reduces the total IO power consumption by a factor of approximately 6 times at a maximum synthesizable frequency of 293.77MHz. Although the speed is approximately half of the native built-in BCD-to-seven decoder, the comparatively slow refresh rates of typical microdisplays indicate this to be a tolerable trade-off, which promotes data density over speed.
التعليقات
جاري جلب التعليقات جاري جلب التعليقات
سجل دخول لتتمكن من متابعة معايير البحث التي قمت باختيارها
mircosoft-partner

هل ترغب بارسال اشعارات عن اخر التحديثات في شمرا-اكاديميا