Extrinsic and Intrinsic Charge Trapping at the Graphene/Ferroelectric Interface

The interface between graphene and the ferroelectric superlattice $mathrm{PbTiO_3/SrTiO_3}$ (PTO/STO) is studied. Tuning the transition temperature through the PTO/STO volume fraction minimizes the adsorbates at the graphene-ferroelectric interface, allowing robust ferroelectric hysteresis to be demonstrated. Intrinsic charge traps from the ferroelectric surface defects can adversely affect the graphene channel hysteresis, and can be controlled by careful sample processing, enabling systematic study of the charge trapping mechanism.

Mobility-dependent Low-frequency Noise in Graphene Field Effect Transistors

We have investigated the low-frequency 1/f noise of both suspended and on-substrate graphene field-effect transistors and its dependence on gate voltage, in the temperature range between 300K and 30K. We have found that the noise amplitude away from the Dirac point can be described by a generalized Hooges relation in which the Hooge parameter {alpha}H is not constant but decreases monotonically with the devices mobility, with a universal dependence that is sample and temperature independent. The value of {alpha}H is also affected by the dynamics of disorder, which is not reflected in the DC transport characteristics and varies with sample and temperature. We attribute the diverse behavior of gate voltage dependence of the noise amplitude to the relative contributions from various scattering mechanisms, and to potential fluctuations near the Dirac point caused by charge carrier inhomogeneity. The higher carrier mobility of suspended graphene devices accounts for values of 1/f noise significantly lower than those observed in on-substrate graphene devices and most traditional electronic materials.