Three types of first generation epitaxial graphene field effect transistors (FET) are presented and their relative merits are discussed. Graphene is epitaxially grown on both the carbon and silicon faces of hexagonal silicon carbide and patterned wit
h electron beam lithography. The channels have a Hall bar geometry to facilitate magnetoresistance measurements. FETs patterned on the Si-face exhibit off-to-on channel resistance ratios that exceed 30. C-face FETs have lower off-to-on resistance ratios, but their mobilities (up to 5000 cm2/Vs) are much larger than that for Si-face transistors. Initial investigations into all-graphene side gate FET structures are promising.
Graphene oxide (GO) flakes have been deposited to bridge the gap between two epitaxial graphene electrodes to produce all-graphene devices. Electrical measurements indicate the presence of Schottky barriers (SB) at the graphene/graphene oxide junctio
ns, as a consequence of the band-gap in GO. The barrier height is found to be about 0.7 eV, and is reduced after annealing at 180 $^circ$C, implying that the gap can be tuned by changing the degree of oxidation. A lower limit of the GO mobility was found to be 850 cm$^2$/Vs, rivaling silicon. {it In situ} local oxidation of patterned epitaxial graphene has been achieved.
