Transport in Josephson junctions is commonly described using a simplifying assumption called the Andreev approximation, which assumes that excitations are fixed at the Fermi momentum and only Andreev reflections occur at interfaces (with no normal re
flections). This approximation is appropriate for BCS-type superconductors, where the chemical potential vastly exceeds the pairing gap, but it breaks down for superconductors with low carrier density, such as topological superconductors, doped semiconductors, or superfluid quantum gases. Here, we present a generic $analytical$ framework for calculating transport in Josephson junctions that lifts up the requirement of the Andreev approximation. Using this general framework, we study in detail transport in Josephson junctions across the BCS-BEC crossover, which describes the evolution from a BCS-type superconductor with loosely-paired Cooper pairs to a BEC of tighly-paired dimers. As the interaction is tuned from the BCS to the BEC regime, we find that the overall subgap current caused by multiple Andreev reflections decreases, but nonlinearities in the current-voltage characteristic called the subharmonic gap structure become more pronounced near the intermediate unitary limit, giving rise to sharp peaks and dips in the differential conductance with even $negative$ conductance at specific voltages.
Hardware platforms in high performance computing are constantly getting more complex to handle even when considering multicore CPUs alone. Numerous features and configuration options in the hardware and the software environment that are relevant for
performance are not even known to most application users or developers. Microbenchmarks, i.e., simple codes that fathom a particular aspect of the hardware, can help to shed light on such issues, but only if they are well understood and if the results can be reconciled with known facts or performance models. The insight gained from microbenchmarks may then be applied to real applications for performance analysis or optimization. In this paper we investigate two modern Intel x86 server CPU architectures in depth: Broadwell EP and Cascade Lake SP. We highlight relevant hardware configuration settings that can have a decisive impact on code performance and show how to properly measure on-chip and off-chip data transfer bandwidths. The new victim L3 cache of Cascade Lake and its advanced replacement policy receive due attention. Finally we use DGEMM, sparse matrix-vector multiplication, and the HPCG benchmark to make a connection to relevant application scenarios.
An accurate prediction of scheduling and execution of instruction streams is a necessary prerequisite for predicting the in-core performance behavior of throughput-bound loop kernels on out-of-order processor architectures. Such predictions are an in
dispensable component of analytical performance models, such as the Roofline and the Execution-Cache-Memory (ECM) model, and allow a deep understanding of the performance-relevant interactions between hardware architecture and loop code. We present the Open Source Architecture Code Analyzer (OSACA), a static analysis tool for predicting the execution time of sequential loops comprising x86 instructions under the assumption of an infinite first-level cache and perfect out-of-order scheduling. We show the process of building a machine model from available documentation and semi-automatic benchmarking, and carry it out for the latest Intel Skylake and AMD Zen micro-architectures. To validate the constructed models, we apply them to several assembly kernels and compare runtime predictions with actual measurements. Finally we give an outlook on how the method may be generalized to new architectures.
We study the effects of strong electron-electron interactions on the surface of cubic topological Kondo insulators (such as samarium hexaboride, SmB$_6$). Cubic topological Kondo insulators generally support three copies of massless Dirac nodes on th
e surface, but only two of them are energetically degenerate and exhibit an energy offset relative to the third one. With a tunable chemical potential, when the surface states host electron and hole pockets of comparable size, strong interactions may drive this system into rotational symmetry breaking nematic and translational symmetric breaking excitonic spin- or charge-density-wave phases, depending on the relative chirality of the Dirac cones. Taking a realistic surface band structure into account we analyze the associated Ginzburg-Landau theory and compute the mean field phase diagram for interacting surface states. Beyond mean field theory, this system can be described by a two-component isotropic Ashkin-Teller model at finite temperature, and we outline the phase diagram of this model. Our theory provides a possible explanation of recent measurements which detect a two-fold symmetric magnetoresistance and an upturn in surface resistivity with tunable gate voltage in SmB$_6$. Our discussion can also be germane to other cubic topological insulators, such as ytterbium hexaboride (YbB$_6$), plutonium hexaboride (PuB$_6$).
