The total ionizing dose irradiation (TID) effects of partially depleted (PD) silicon-on-insulator (SOI)devices which fabricated with a commercial 0.2 um SOI process are investigated. Experimental results show an original phenomenon that the ON irradi
ation bias configuration is the worst-case bias for both front-gate and back-gate transistor. To understand the mechanism, a charge distribution model is proposed. We think that the performance degradation of the devices is due to the radiation induced positive charge trapped in the bottom corner of shallow trench isolation (STI) oxide. In addition, comparing the irradiation responses of short and long channel devices under different drain bias, the short channel transistors show a larger degeneration of leakage current and threshold voltage. The dipole theory is introduced to explain the TID enhanced short channel effect.
