No Arabic abstract
Distributed quantum computation requires quantum operations that act over a distance on error-correction encoded states of logical qubits, such as the transfer of qubits via teleportation. We evaluate the performance of several quantum error correction codes, and find that teleportation failure rates of one percent or more are tolerable when two levels of the [[23,1,7]] code are used. We present an analysis of performing quantum error correction (QEC) on QEC-encoded states that span two quantum computers, including the creation of distributed logical zeroes. The transfer of the individual qubits of a logical state may be multiplexed in time or space, moving serially across a single link, or in parallel across multiple links. We show that the performance and reliability penalty for using serial links is small for a broad range of physical parameters, making serial links preferable for a large, distributed quantum multicomputer when engineering difficulties are considered. Such a multicomputer will be able to factor a 1,024-bit number using Shors algorithm with a high probability of success.
We present a new approach to scalable quantum computing--a ``qubus computer--which realises qubit measurement and quantum gates through interacting qubits with a quantum communication bus mode. The qubits could be ``static matter qubits or ``flying optical qubits, but the scheme we focus on here is particularly suited to matter qubits. There is no requirement for direct interaction between the qubits. Universal two-qubit quantum gates may be effected by schemes which involve measurement of the bus mode, or by schemes where the bus disentangles automatically and no measurement is needed. In effect, the approach integrates together qubit degrees of freedom for computation with quantum continuous variables for communication and interaction.
Experimental groups are now fabricating quantum processors powerful enough to execute small instances of quantum algorithms and definitively demonstrate quantum error correction that extends the lifetime of quantum data, adding urgency to architectural investigations. Although other options continue to be explored, effort is coalescing around topological coding models as the most practical implementation option for error correction on realizable microarchitectures. Scalability concerns have also motivated architects to propose distributed memory multicomputer architectures, with experimental efforts demonstrating some of the basic building blocks to make such designs possible. We compile the latest results from a variety of different systems aiming at the construction of a scalable quantum computer.
We present a communication-efficient distributed protocol for computing the Babai point, an approximate nearest point for a random vector ${bf X}inmathbb{R}^n$ in a given lattice. We show that the protocol is optimal in the sense that it minimizes the sum rate when the components of ${bf X}$ are mutually independent. We then investigate the error probability, i.e. the probability that the Babai point does not coincide with the nearest lattice point. In dimensions two and three, this probability is seen to grow with the packing density. For higher dimensions, we use a bound from probability theory to estimate the error probability for some well-known lattices. Our investigations suggest that for uniform distributions, the error probability becomes large with the dimension of the lattice, for lattices with good packing densities. We also consider the case where $mathbf{X}$ is obtained by adding Gaussian noise to a randomly chosen lattice point. In this case, the error probability goes to zero with the lattice dimension when the noise variance is sufficiently small. In such cases, a distributed algorithm for finding the approximate nearest lattice point is sufficient for finding the nearest lattice point.
We describe and analyze an efficient register-based hybrid quantum computation scheme. Our scheme is based on probabilistic, heralded optical connection among local five-qubit quantum registers. We assume high fidelity local unitary operations within each register, but the error probability for initialization, measurement, and entanglement generation can be very high (~5%). We demonstrate that with a reasonable time overhead our scheme can achieve deterministic non-local coupling gates between arbitrary two registers with very high fidelity, limited only by the imperfections from the local unitary operation. We estimate the clock cycle and the effective error probability for implementation of quantum registers with ion-traps or nitrogen-vacancy (NV) centers. Our new scheme capitalizes on a new efficient two-level pumping scheme that in principle can create Bell pairs with arbitrarily high fidelity. We introduce a Markov chain model to study the stochastic process of entanglement pumping and map it to a deterministic process. Finally we discuss requirements for achieving fault-tolerant operation with our register-based hybrid scheme, and also present an alternative approach to fault-tolerant preparation of GHZ states.
In a large-scale quantum computer, the cost of communications will dominate the performance and resource requirements, place many severe demands on the technology, and constrain the architecture. Unfortunately, fault-tolerant computers based entirely on photons with probabilistic gates, though equipped with built-in communication, have very large resource overheads; likewise, computers with reliable probabilistic gates between photons or quantum memories may lack sufficient communication resources in the presence of realistic optical losses. Here, we consider a compromise architecture, in which semiconductor spin qubits are coupled by bright laser pulses through nanophotonic waveguides and cavities using a combination of frequent probabilistic and sparse determinstic entanglement mechanisms. The large photonic resource requirements incurred by the use of probabilistic gates for quantum communication are mitigated in part by the potential high-speed operation of the semiconductor nanophotonic hardware. The system employs topological cluster-state quantum error correction for achieving fault-tolerance. Our results suggest that such an architecture/technology combination has the potential to scale to a system capable of attacking classically intractable computational problems.