Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userScanning Test System Prototype of p/sFEB for the ATLAS Phase-I sTGC Trigger Upgrade
337
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
The Pad Front End Board (pFEB) and the Strip Front End Board (sFEB) are developed for the ATLAS Phase-I sTGC Trigger Upgrade. The pFEB is used to to gather and analyze pads trigger, and the sFEB is developed to accept the pad trigger to define the regions-of-interest for strips readout. The performance of p/sFEBs must be confirmed before they are mounted on the sTGC detector. We will present the scanning test system prototype which is designed according to the test requirements of the p/sFEB. In this test system prototype, a simulation signal board is developed to generate different types of signal to the p/sFEB. PC software and FPGA XADC cooperate to achieve the scan test of analog parameter.
rate research
Read More
A completely New Small Wheel (NSW) will be constructed for ATLAS Phase-1 upgrade. Small-Strip Thin-Gap-Chamber (sTGC) will devote to the trigger function of NSW. A full-size sTGC quadruplet consists of 4 layers, and will need 4 pad Front-End-Boards and 4 strip Front-End-Boards for sTGC signals readout. The 8 boards should be readout simultaneously at a time. This paper presents the study of multi-layer sTGC test system, a FEB Driver Card (FEBDC) is designed for pFEB and sFEB boards handling. The design and test of FEBDC are described in details.
This paper presents a readout system designed for testing the prototype of Small-Strip Thin Gap Chamber (sTGC), which is one of the main detector technologies used for ATLAS New-Small-Wheel Upgrade. This readout system aims at testing one full-size sTGC quadruplet with cosmic muon triggers.
Following the Higgs particle discovery, the Large Hadron Collider complex will be upgraded in several phases allowing the luminosity to increase to $7 times 10^{34}cm^{-2}s^{-1}$. In order to adapt the ATLAS detector to the higher luminosity environment after the upgrade, part of the ATLAS muon end-cap system, the Small Wheel, will be replaced by the New Small Wheel. The New Small Wheel includes two kinds of detectors: small-strip Thin Gap Chambers and Micromegas. Shandong University, part of the ATLAS collaboration, participates in the construction of the ATLAS New Small Wheel by developing, producing and testing the performance of part of the small-strip Thin Gap Chambers. This paper describes the construction and cosmic-ray testing of small-strip Thin Gap Chambers in Shandong University.
Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and measurements validates the ASIC latency characterization.
A Liquid-argon Trigger Digitizer Board (LTDB) is being developed to upgrade the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics. The LTDB located at the front end needs to obtain the clock signals and be configured and monitored remotely from the back end. A clock and control system is being developed for the LTDB and the major functions of the system have been evaluated. The design and evaluation of the clock and control system are presented in this paper.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
