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SOI (Silicon-On-Insulator) pixel sensor is promising technology for developing the high position resolution detector by integrating the small pixels and circuits in the monolithic way. The event driven (trigger mode) SOI based pixel sensor has also been developed for the application of X-ray astronomy with the purpose of reducing the noise using anti-coincidence event. This trigger mode SOI pixel sensor working with in the rate of kilo Hz is also a promising scatter detector for advanced Compton imaging to track the Compton recoiled electrons.
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An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry witch mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.
The X-ray SOI pixel sensor onboard the FORCE satellite will be placed in the low earth orbit and will consequently suffer from the radiation effects mainly caused by geomagnetically trapped cosmic-ray protons. Based on previous studies on the effects of radiation on SOI pixel sensors, the positive charges trapped in the oxide layer significantly affect the performance of the sensor. To improve the radiation hardness of the SOI pixel sensors, we introduced a double-SOI (D-SOI) structure containing an additional middle Si layer in the oxide layer. The negative potential applied on the middle Si layer compensates for the radiation effects, due to the trapped positive charges. Although the radiation hardness of the D-SOI pixel sensors for applications in high-energy accelerators has been evaluated, radiation effects for astronomical application in the D-SOI sensors has not been evaluated thus far. To evaluate the radiation effects of the D-SOI sensor, we perform an irradiation experiment using a 6-MeV proton beam with a total dose of ~ 5 krad, corresponding to a few tens of years of in-orbit operation. This experiment indicates an improvement in the radiation hardness of the X- ray D-SOI devices. On using an irradiation of 5 krad on the D-SOI device, the energy resolution in the full-width half maximum for the 5.9-keV X-ray increases by 7 $pm$ 2%, and the chip output gain decreases by 0.35 $pm$ 0.09%. The physical mechanism of the gain degradation is also investigated; it is found that the gain degradation is caused by an increase in the parasitic capacitance due to the enlarged buried n-well.
We are investigating adaption of SOI pixel devices for future high energy physic(HEP) experiments. The pixel sensors are required to be operational in very severe radiation environment. Most challenging issue in the adoption is the TID (total ionizing dose) damage where holes trapped in oxide layers affect the operation of nearby transistors. We have introduced a second SOI layer - SOI2 beneath the BOX (Buried OXide) layer - in order to compensate for the TID effect by applying a negative voltage to this electrode to cancel the effect caused by accumulated positive holes. In this paper, the TID effects caused by Co gamma-ray irradiation are presented based on the transistor characteristics measurements. The irradiation was carried out in various biasing conditions to investigate hole accumulation dependence on the potential configurations. We also compare the data with samples irradiated with X-ray. Since we observed a fair agreement between the two irradiation datasets, the TID effects have been investigated in a wide dose range from 100~Gy to 2~MGy.
We have developed a neutron imaging sensor based on an INTPIX4-SOI pixelated silicon device. Neutron irradiation tests are performed at several neutron facilities to investigate sensors responses for neutrons. Detection efficiency is measured to be around $1.5$% for thermal neutrons. Upper bound of spatial resolution is evaluated to be $4.1 pm 0.2 ~mu$m in terms of a standard deviation of the line spread function.
Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The results were backed by a numerical simulation of charge collection in an equivalent detector layout.
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