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Register a new userThe D0 Run II Impact Parameter Trigger
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Many physics topics to be studied by the D0 experiment during Run II of the Fermilab Tevatron ppbar collider give rise to final states containing b--flavored particles. Examples include Higgs searches, top quark production and decay studies, and full reconstruction of B decays. The sensitivity to such modes has been significantly enhanced by the installation of a silicon based vertex detector as part of the DO detector upgrade for Run II. Interesting events must be identified initially in 100-200 microseconds to be available for later study. This paper describes custom electronics used in the DO trigger system to provide the real--time identification of events having tracks consistent with the decay of b--flavored particles.
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I present the current status of the D0 trigger system in Run II at the Tevatron.
The performance of the D0 experiment forward muon scintillation counters system during Run II of the Tevatron from 2001 to 2011 is described. The system consists of 4214 scintillation counters in six layers. The long term stability of the counters amplitude response determined using LED calibration system and muons produced in proton-antiproton collisions is presented. The average signal amplitude for counters of all layers has gradually decreased over ten years by 11%. The reference timing, determined using LED calibration, was stable within 0.26 ns. Average value of muon timing peak position was used for periodic D0 clock signal adjustments to compensate seasonal drift caused by temperature variations. Counters occupancy for different triggers in physics data collection runs and for minimum bias triggers are presented. The single muon yields versus time and the luminosity dependence of yields were stable for the forward muon system within 1% over 10 years.
The ALICE Central Trigger Processor (CTP) is going to be upgraded for LHC Run 3 with completely new hardware and a new Trigger and Timing Control (TTC-PON) system based on a Passive Optical Network (PON) system. The new trigger system has been designed as dead time free and able to transmit trigger data at 9.6 Gbps. A new universal trigger board has been designed, where by changing the FMC card, it can function as a CTP or as a LTU. It is based on the Xilinx Kintex Ultrascale FPGA and upgraded TTC-PON. The new trigger system and the prototype of the trigger board will be presented.
The CMS Level-1 calorimeter trigger is being upgraded in two stages to maintain performance as the LHC increases pile-up and instantaneous luminosity in its second run. In the first stage, improved algorithms including event-by-event pile-up corrections are used. New algorithms for heavy ion running have also been developed. In the second stage, higher granularity inputs and a time-multiplexed approach allow for improved position and energy resolution. Data processing in both stages of the upgrade is performed with new, Xilinx Virtex-7 based AMC cards.
The LHCb experiment at CERN is undergoing an upgrade in preparation for the Run 3 data taking period of the LHC. As part of this upgrade the trigger is moving to a fully software implementation operating at the LHC bunch crossing rate. We present an evaluation of a CPU-based and a GPU-based implementation of the first stage of the High Level Trigger. After a detailed comparison both options are found to be viable. This document summarizes the performance and implementation details of these options, the outcome of which has led to the choice of the GPU-based implementation as the baseline.
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