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Practical design and simulation of silicon-based quantum dot qubits

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 Added by Mark Friesen
 Publication date 2002
  fields Physics
and research's language is English




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Spins based in silicon provide one of the most promising architectures for quantum computing. A scalable design for silicon-germanium quantum dot qubits is presented. The design incorporates vertical and lateral tunneling. Simulations of a four-qubit array suggest that the design will enable single electron occupation of each dot of a many-dot array. Performing two-qubit operations has negligible effect on other qubits in the array. Simulation results are used to translate error correction requirements into specifications for gate-voltage control electronics. This translation is a necessary link between error correction theory and device physics.

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Spins based in silicon provide one of the most promising architectures for quantum computing. Quantum dots are an inherently scalable technology. Here, we combine these two concepts into a workable design for a silicon-germanium quantum bit. The novel structure incorporates vertical and lateral tunneling, provides controlled coupling between dots, and enables single electron occupation of each dot. Precise modeling of the design elucidates its potential for scalable quantum computing. For the first time it is possible to translate the requirements of fault-tolerant error correction into specific requirements for gate voltage control electronics in quantum dots. We demonstrate that these requirements are met by existing pulse generators in the kHz-MHz range, but GHz operation is not yet achievable. Our calculations further pinpoint device features that enhance operation speed and robustness against leakage errors. We find that the component technologies for silicon quantum dot quantum computers are already in hand.
95 - R. Li , L. Petit , D.P. Franke 2017
The spin states of single electrons in gate-defined quantum dots satisfy crucial requirements for a practical quantum computer. These include extremely long coherence times, high-fidelity quantum operation, and the ability to shuttle electrons as a mechanism for on-chip flying qubits. In order to increase the number of qubits to the thousands or millions of qubits needed for practical quantum information we present an architecture based on shared control and a scalable number of lines. Crucially, the control lines define the qubit grid, such that no local components are required. Our design enables qubit coupling beyond nearest neighbors, providing prospects for non-planar quantum error correction protocols. Fabrication is based on a three-layer design to define qubit and tunnel barrier gates. We show that a double stripline on top of the structure can drive high-fidelity single-qubit rotations. Qubit addressability and readout are enabled by self-aligned inhomogeneous magnetic fields induced by direct currents through superconducting gates. Qubit coupling is based on the exchange interaction, and we show that parallel two-qubit gates can be performed at the detuning noise insensitive point. While the architecture requires a high level of uniformity in the materials and critical dimensions to enable shared control, it stands out for its simplicity and provides prospects for large-scale quantum computation in the near future.
A two-qubit controlled-NOT (CNOT) gate, realized by a controlled-phase (C-phase) gate combined with single-qubit gates, has been experimentally implemented recently for quantum-dot spin qubits in isotopically enriched silicon, a promising solid-state system for practical quantum computation. In the experiments, the single-qubit gates have been demonstrated with fault-tolerant control-fidelity, but the infidelity of the two-qubit C-phase gate is, primarily due to the electrical noise, still higher than the required error threshold for fault-tolerant quantum computation (FTQC). Here, by taking the realistic system parameters and the experimental constraints on the control pulses into account, we construct experimentally realizable high-fidelity CNOT gates robust against electrical noise with the experimentally measured $1/f^{1.01}$ noise spectrum and also against the uncertainty in the interdot tunnel coupling amplitude. Our optimal CNOT gate has about two orders of magnitude improvement in gate infidelity over the ideal C-phase gate constructed without considering any noise effect. Furthermore, within the same control framework, high-fidelity and robust single-qubit gates can also be constructed, paving the way for large-scale FTQC.
Electrons and holes confined in quantum dots define an excellent building block for quantum emergence, simulation, and computation. In order for quantum electronics to become practical, large numbers of quantum dots will be required, necessitating the fabrication of scaled structures such as linear and 2D arrays. Group IV semiconductors contain stable isotopes with zero nuclear spin and can thereby serve as excellent host for spins with long quantum coherence. Here we demonstrate group IV quantum dot arrays in silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe) and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make ohmic contact to metals, the overlapping gate structure to define the quantum dots can be based on a nearly identical integration. We realize charge sensing in each platform, for the first time in Ge/SiGe, and demonstrate fully functional linear and two-dimensional arrays where all quantum dots can be depleted to the last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N+1 method to simultaneously reach the few electron regime for each quantum dot. We compare capacitive cross talk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. These results constitute an excellent base for quantum computation with quantum dots and provide opportunities for each platform to be integrated with standard semiconductor manufacturing.
Quantum gates between spin qubits can be implemented leveraging the natural Heisenberg exchange interaction between two electrons in contact with each other. This interaction is controllable by electrically tailoring the overlap between electronic wavefunctions in quantum dot systems, as long as they occupy neighbouring dots. An alternative route is the exploration of superexchange - the coupling between remote spins mediated by a third idle electron that bridges the distance between quantum dots. We experimentally demonstrate direct exchange coupling and provide evidence for second neighbour mediated superexchange in a linear array of three single-electron spin qubits in silicon, inferred from the electron spin resonance frequency spectra. We confirm theoretically through atomistic modeling that the device geometry only allows for sizeable direct exchange coupling for neighbouring dots, while next nearest neighbour coupling cannot stem from the vanishingly small tail of the electronic wavefunction of the remote dots, and is only possible if mediated.
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