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Register a new userMiniaturization of Josephson junction for digital superconducting circuits
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In this work, we briefly overview various options for Josephson junctions which should be scalable down to nanometer range for utilization in nanoscale digital superconducting technology. Such junctions should possess high values of critical current, $I_c$, and normal state resistance, $R_n$. Another requirement is the high reproducibility of the junction parameters across a wafer in a fabrication process. We argue that Superconductor - Normal metal - Superconductor (SN-N-NS) Josephson junction of variable thickness bridge geometry is a promising choice to meet these requirements. Theoretical analysis of SN-N-NS junction is performed in the case where the distance between the S-electrodes is comparable to the coherence length of the N-material. The restriction on the junction geometrical parameters providing the existence of superconductivity in the S-electrodes is derived for the current flowing through the junction of an order of $I_c$. The junction heating, as well as available mechanisms for the heat removal, is analyzed. The obtained results show that an SN-N-NS junction with a high (sub-millivolt) value of $I_cR_n$ product can be fabricated from a broadly utilized combination of materials like Nb/Cu using well-established technological processes. The junction area can be scaled down to that of semiconductor transistors fabricated in the frame of a 40-nm process.
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We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with $T_1$ relaxation times averaging above 50$~mu$s ($Q>$1.5$times$ 10$^6$). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type (PICT) junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. In a study of more than 3600 junctions, we show an average resistance variation of 3.7$%$ on a wafer that contains forty 0.5$times$0.5-cm$^2$ chips, with junction areas ranging between 0.01 and 0.16 $mu$m$^2$. The average on-chip spread in resistance is 2.7$%$, with 20 chips varying between 1.4 and 2$%$. For the junction sizes used for transmon qubits, we deduce a wafer-level transition-frequency variation of 1.7-2.5$%$. We show that 60-70$%$ of this variation is attributed to junction-area fluctuations, while the rest is caused by tunnel-junction inhomogeneity. Such high frequency predictability is a requirement for scaling-up the number of qubits in a quantum computer.
Magnetic flux quantization in superconductors allows the implementation of fast and energy-efficient digital superconducting circuits. However, the information representation in magnetic flux severely limits their functional density presenting a long-standing problem. Here we introduce a concept of superconducting digital circuits that do not utilize magnetic flux and have no inductors. We argue that neither the use of geometrical nor kinetic inductance is promising for the deep scaling of superconducting circuits. The key idea of our approach is the utilization of bistable Josephson junctions allowing the representation of information in their Josephson energy. Since the proposed circuits are composed of Josephson junctions only, they can be called all-Josephson junction (all-JJ) circuits. We present a methodology for the design of the circuits consisting of conventional and bistable junctions. We analyze the principles of the circuit functioning, ranging from simple logic cells and ending with an 8-bit parallel adder. The utilization of bistable junctions in the all-JJ circuits is promising in the aspects of simplification of schematics and the decrease of the JJ count leading to space-efficiency.
A novel way to realize a pi Josephson junction is proposed, based on a weak link in an unconventional d-wave superconductor with appropriately chosen boundary geometry. The critical current of such a junction is calculated from a fully selfconsistent solution of microscopic Eilenberger theory of superconductivity. The results clearly show, that a transition to a pi Josephson junction occurs for both low temperatures and small sizes of the geometry.
Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions of Josephson junctions per square centimeter. However, conventional DC and multi-phase AC biasing techniques already encounter serious challenges for scaling circuits above several hundred thousand junctions. In this work, we propose a novel AC-based biasing scheme for RSFQ-type logic families requiring DC bias. The major step toward this scheme is a superconducting AC/DC rectifier which we introduced at ASC 2014. Initially, we proposed to connect the rectifiers to payload cells via superconducting inductors with large inductance in order to reduce parasitic effects of flux quantization. Recently, we discovered that this powering scheme works even better at a much lower value of the inductance, when it is just sufficient to hold only one or two flux quanta in the inductive loop between the converter and the payload. In this case, flux quantization in the loop becomes beneficial because the value of current fed into the payload is defined by the value of the coupling inductance. Therefore, our AC/SFQ converter powers the payload cell by a single flux quantum rather than by DC current. Such mode of operation is extremely energy efficient because the energy is used only to recover flux quantum consumed by the cell during the logic operation. We present designs of AC/SFQ converters comprising an AC/DC rectifier and a current conditioning circuit which we termed an SFQ filter. We also present test results and demonstrate AC/SFQ powering a payload circuit using circuits fabricated in a new, 150-nm node of Lincoln Laboratory fabrication technology using self-shunted Nb/AlOx-Al/Nb Josephson junctions with 600 $mu$A/$mu$$m^2$ critical current density and 200 nm minimum linewidth of inductors.
New technology for superconductor integrated circuits has been developed and is presented. It employs diffusion stoplayers (DSLs) to protect Josephson junctions (JJs) from interlayer migration of impurities, improve JJ critical current (Ic) targeting and reproducibility, eliminate aging, and eliminate pattern-dependent effects in Ic and tunneling characteristics of Nb/Al/AlOx/Nb junctions in integrated circuits. The latter effects were recently found in Nb-based JJs integrated into multilayered digital circuits. E.g., it was found that Josephson critical current density (Jc) may depend on the JJs environment, on the type and size of metal layers making contact to niobium base (BE) and counter electrodes (CE) of the junction, and also change with time. Such Jc variations within a circuit reduce circuit performance and yield, and restrict integration scale. This variability of JJs is explained as caused by hydrogen contamination of Nb layers during wafer processing, which changes the height and structural properties of AlOx tunnel barrier. Redistribution of hydrogen impurities between JJ electrodes and other circuit layers by diffusion along Nb wires and through contacts between layers causes long-term drift of Jc. At least two DSLs are required to completely protect JJs from impurity diffusion effects - right below the junction BE and right above the junction CE. The simplest and the most technologically convenient DSLs we have found are thin (from 3 nm to 10 nm) layers of Al. They were deposited in-situ under the BE layer, thus forming an Al/Nb/Al/AlOx/Nb penta-layer, and under the first wiring layer to junctions CE, thus forming an Al/Nb wiring bi-layer. A significant improvement of Jc uniformity on 150-mm wafer has also been obtained along with large improvements in Jc targeting and run-to-run reproducibility.
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