Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userCharacterization of the CMS Endcap Timing Layer readout chip prototype with charge injection
237
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS technology, reads out a 16x16 pixel matrix of the Low-Gain Avalanche Detector (LGAD). The jitter contribution from ETROC is required to be below 40 ps to achieve the 50 ps overall time resolution per hit. The analog readout circuits in ETROC consist of the preamplifier and the discriminator. The preamplifier handles the LGAD charge signal with the most probable value of around 15 fC. The discriminator generates the digital pulse, which provides the Time-Of-Arrival (TOA, leading edge) and Time-Over-Threshold (TOT, pulse width) information. The prototype of ETROC (ETROC0) that implements a single channel of analog readout circuits has been evaluated with charge injection. The jitter of the analog readout circuits, measured from the discriminators leading edge, is better than 16 ps for a charge larger than 15 fC with the sensor capacitance. The time walk resulting from different pulse heights can be corrected using the TOT measurement. The time resolution distribution has a standard deviation of 29 ps after the time-walk correction from the charge injection. At room temperature, the preamplifiers power consumption is measured to be 0.74 mW and 1.53 mW per pixel in the low- and high-power mode, respectively. The measured power consumption of the discriminator is 0.84 mW per pixel. With the ASIC alone or the LGAD sensor, The characterization performances fulfill the ETLs challenging requirements.
rate research
Read More
We present the implementation and verification of an in-pixel automatic threshold calibration circuit for the CMS Endcap Timing Layer (ETL) in the High-Luminosity LHC upgrade. The discriminator threshold of the ETL readout chip (ETROC) needs to be calibrated regularly to mitigate the circuit baseline change. Traditional methods need a lot of communication through a slow control system hence are time-consuming. This paper describes an in-pixel automatic scheme with improvements in operating time and usability. In this scheme, a sample-accumulation circuit is used to measure the average discriminator output. A binary successive approximation and linear combination scan are applied to find the equivalent baseline. The actual calibration procedure has been first implemented in FPGA firmware and tested with the ETROC front-end prototype chip (ETROC0). The calibration circuit has been implemented with Triple Modular Redundancy (TMR) and verified with Single Event Effects (SEEs) simulation. A complete calibration process lasts 35 ms with a 40 MHz clock. In the worst case, the dynamic and static power consumption are estimated to be 300 uW and 10.4 uW, respectively. The circuit design, implemented in a 65 CMOS technology, will be integrated into ETROC2, the next iteration of the ETROC with a 16x16 pixel matrix.
The PhaseII Upgrades of CMS are being planned for the High Luminosity LHC (HL-LHC) era when the mean number of interactions per beam crossing (in-time pileup) is expected to reach ~140-200. The potential backgrounds arising from mis-associated jets and photon showers, for example, during event reconstruction could be reduced if physics objects are tagged with an event time. This tag is fully complementary to the event vertex which is already commonly used to reduce mis-reconstruction. Since the tracking vertex resolution is typically ~10^{-3} (50 micron/4.8cm) of the rms vertex distribution, whereas only ~10^{-1} (i.e. 20 vs.170 picoseconds (psec)) is demonstrated for timing, it is often assumed that only photon (i.e. EM calorimeter or shower-max) timing is of interest. We show that the optimal solution will likely be a single timing layer which measures both charged particle and photon time (a pre-shower layer).
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity LHC upgrade. One of the challenges of the ETROC design is that the TDC is required to consume less than 200 W for each pixel at the nominal hit occupancy of 1%. To meet the low-power requirement, we use a single delay line for both the Time of Arrival (TOA) and the Time over Threshold (TOT) measurements without delay control. A double-strobe self-calibration scheme is used to compensate for process variation, temperature, and power supply voltage. The TDC is fabricated in a 65 nm CMOS technology. The overall performances of the TDC have been evaluated. The TOA has a bin size of 17.8 ps within its effective dynamic range of 11.6 ns. The effective measurement precision of the TOA is 5.6 ps and 9.9 ps with and without the nonlinearity correction, respectively. The TDC block consumes 97 W at the hit occupancy of 1%. Over a temperature range from 23 C to 78 C and a power supply voltage range from 1.05 V to 1.35 V (the nominal value of 1.20 V), the self-calibrated bin size of the TOA varies within 0.4%. The measured TDC performances meet the requirements except that more tests will be performed in the future to verify that the TDC complies with the radiation-tolerance specifications.
Gas Electron Multiplier (GEM) technology is being considered for the forward muon upgrade of the CMS experiment in Phase 2 of the CERN LHC. Its first implementation is planned for the GE1/1 system in the $1.5 < midetamid < 2.2$ region of the muon endcap mainly to control muon level-1 trigger rates after the second long LHC shutdown. A GE1/1 triple-GEM detector is read out by 3,072 radial strips with 455 $mu$rad pitch arranged in eight $eta$-sectors. We assembled a full-size GE1/1 prototype of 1m length at Florida Tech and tested it in 20-120 GeV hadron beams at Fermilab using Ar/CO$_{2}$ 70:30 and the RD51 scalable readout system. Four small GEM detectors with 2-D readout and an average measured azimuthal resolution of 36 $mu$rad provided precise reference tracks. Construction of this largest GEM detector built to-date is described. Strip cluster parameters, detection efficiency, and spatial resolution are studied with position and high voltage scans. The plateau detection efficiency is [97.1 $pm$ 0.2 (stat)]%. The azimuthal resolution is found to be [123.5 $pm$ 1.6 (stat)] $mu$rad when operating in the center of the efficiency plateau and using full pulse height information. The resolution can be slightly improved by $sim$ 10 $mu$rad when correcting for the bias due to discrete readout strips. The CMS upgrade design calls for readout electronics with binary hit output. When strip clusters are formed correspondingly without charge-weighting and with fixed hit thresholds, a position resolution of [136.8 $pm$ 2.5 stat] $mu$rad is measured, consistent with the expected resolution of strip-pitch/$sqrt{12}$ = 131.3 $mu$rad. Other $eta$-sectors of the detector show similar response and performance.
The MIP Timing Detector will provide additional timing capabilities for detection of minimum ionizing particles (MIPs) at CMS during the High Luminosity LHC era, improving event reconstruction and pileup rejection. The central portion of the detector, the Barrel Timing Layer (BTL), will be instrumented with LYSO:Ce crystals and Silicon Photomultipliers (SiPMs) providing a time resolution of about 30 ps at the beginning of operation, and degrading to 50-60 ps at the end of the detector lifetime as a result of radiation damage. In this work, we present the results obtained using a 120 GeV proton beam at the Fermilab Test Beam Facility to measure the time resolution of unirradiated sensors. A proof-of-concept of the sensor layout proposed for the barrel region of the MTD, consisting of elongated crystal bars with dimensions of about 3 x 3 x 57 mm$^3$ and with double-ended SiPM readout, is demonstrated. This design provides a robust time measurement independent of the impact point of the MIP along the crystal bar. We tested LYSO:Ce bars of different thickness (2, 3, 4 mm) with a geometry close to the reference design and coupled to SiPMs manufactured by Hamamatsu and Fondazione Bruno Kessler. The various aspects influencing the timing performance such as the crystal thickness, properties of the SiPMs (e.g. photon detection efficiency), and impact angle of the MIP are studied. A time resolution of about 28 ps is measured for MIPs crossing a 3 mm thick crystal bar, corresponding to an MPV energy deposition of 2.6 MeV, and of 22 ps for the 4.2 MeV MPV energy deposition expected in the BTL, matching the detector performance target for unirradiated devices.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
