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Register a new userEfficient flexible characterization of quantum processors with nested error models
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We present a simple and powerful technique for finding a good error model for a quantum processor. The technique iteratively tests a nested sequence of models against data obtained from the processor, and keeps track of the best-fit model and its wildcard error (a quantification of the unmodeled error) at each step. Each best-fit model, along with a quantification of its unmodeled error, constitute a characterization of the processor. We explain how quantum processor models can be compared with experimental data and to each other. We demonstrate the technique by using it to characterize a simulated noisy 2-qubit processor.
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Error models for quantum computing processors describe their deviation from ideal behavior and predict the consequences in applications. But those processors experimental behavior -- the observed outcome statistics of quantum circuits -- are rarely consistent with error models, even in characterization experiments like randomized benchmarking (RB) or gate set tomography (GST), where the error model was specifically extracted from the data in question. We show how to resolve these inconsistencies, and quantify the rate of unmodeled errors, by augmenting error models with a parameterized wildcard error model. Adding wildcard error to an error model relaxes and weakens its predictions in a controlled way. The amount of wildcard error required to restore consistency with data quantifies how much unmodeled error was observed, in a way that facilitates direct comparison to standard gate error rates. Using both simulated and experimental data, we show how to use wildcard error to reconcile error models derived from RB and GST experiments with inconsistent data, to capture non-Markovianity, and to quantify all of a processors observed error.
We present a hardware agnostic error mitigation algorithm for near term quantum processors inspired by the classical Lanczos method. This technique can reduce the impact of different sources of noise at the sole cost of an increase in the number of measurements to be performed on the target quantum circuit, without additional experimental overhead. We demonstrate through numerical simulations and experiments on IBM Quantum hardware that the proposed scheme significantly increases the accuracy of cost functions evaluations within the framework of variational quantum algorithms, thus leading to improved ground-state calculations for quantum chemistry and physics problems beyond state-of-the-art results.
Quantum processors with sizes in the 10-100 qubit range are now increasingly common. However, with increased size comes increased complexity for benchmarking. The effectiveness of a given device may vary greatly between different tasks, and will not always be easy to predict from single and two qubit gate fidelities. For this reason, it is important to assess processor quality for a range of important tasks. In this work we propose and implement tests based on random quantum circuits. These are used to evaluate multiple different superconducting qubit devices, with sizes from 5 to 19 qubits, from two hardware manufacturers: IBM Research and Rigetti. The data is analyzed to give a quantitive description of how the devices perform. We also describe how it can be used for a qualititive description accessible to the layperson, by being played as a game.
Error mitigation has been one of the recently sought after methods to reduce the effects of noise when computation is performed on a noisy near-term quantum computer. Interest in simulating stochastic processes with quantum models gained popularity after being proven to require less memory than their classical counterparts. With previous work on quantum models focusing primarily on further compressing memory, this work branches out into the experimental scene; we aim to bridge the gap between theoretical quantum models and practical use with the inclusion of error mitigation methods. It is observed that error mitigation is successful in improving the resultant expectation values. While our results indicate that error mitigation work, we show that its methodology is ultimately constrained by hardware limitations in these quantum computers.
Variational quantum algorithms (VQAs) have the potential of utilizing near-term quantum machines to gain certain computational advantages over classical methods. Nevertheless, modern VQAs suffer from cumbersome computational overhead, hampered by the tradition of employing a solitary quantum processor to handle large-volume data. As such, to better exert the superiority of VQAs, it is of great significance to improve their runtime efficiency. Here we devise an efficient distributed optimization scheme, called QUDIO, to address this issue. Specifically, in QUDIO, a classical central server partitions the learning problem into multiple subproblems and allocate them to multiple local nodes where each of them consists of a quantum processor and a classical optimizer. During the training procedure, all local nodes proceed parallel optimization and the classical server synchronizes optimization information among local nodes timely. In doing so, we prove a sublinear convergence rate of QUDIO in terms of the number of global iteration under the ideal scenario, while the system imperfection may incur divergent optimization. Numerical results on standard benchmarks demonstrate that QUDIO can surprisingly achieve a superlinear runtime speedup with respect to the number of local nodes. Our proposal can be readily mixed with other advanced VQAs-based techniques to narrow the gap between the state of the art and applications with quantum advantage.
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