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Register a new userProspects for Quantum Enhancement with Diabatic Quantum Annealing
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We assess the prospects for algorithms within the general framework of quantum annealing (QA) to achieve a quantum speedup relative to classical state of the art methods in combinatorial optimization and related sampling tasks. We argue for continued exploration and interest in the QA framework on the basis that improved coherence times and control capabilities will enable the near-term exploration of several heuristic quantum optimization algorithms that have been introduced in the literature. These continuous-time Hamiltonian computation algorithms rely on control protocols that are more advanced than those in traditional ground-state QA, while still being considerably simpler than those used in gate-model implementations. The inclusion of coherent diabatic transitions to excited states results in a generalization called diabatic quantum annealing (DQA), which we argue for as the most promising route to quantum enhancement within this framework. Other promising variants of traditional QA include reverse annealing and continuous-time quantum walks, as well as analog analogues of parameterized quantum circuit ansatzes for machine learning. Most of these algorithms have no known (or likely to be discovered) efficient classical simulations, and in many cases have promising (but limited) early signs for the possibility of quantum speedups, making them worthy of further investigation with quantum hardware in the intermediate-scale regime. We argue that all of these protocols can be explored in a state-of-the-art manner by embracing the full range of novel out-of-equilibrium quantum dynamics generated by time-dependent effective transverse-field Ising Hamiltonians that can be natively implemented by, e.g., inductively-coupled flux qubits, both existing and projected at application scale.
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We discuss quantum annealing of the two-dimensional transverse-field Ising model on a D-Wave device, encoded on $L times L$ lattices with $L le 32$. Analyzing the residual energy and deviation from maximal magnetization in the final classical state, we find an optimal $L$ dependent annealing rate $v$ for which the two quantities are minimized. The results are well described by a phenomenological model with two powers of $v$ and $L$-dependent prefactors to describe the competing effects of reduced quantum fluctuations (for which we see evidence of the Kibble-Zurek mechanism) and increasing noise impact when $v$ is lowered. The same scaling form also describes results of numerical solutions of a transverse-field Ising model with the spins coupled to noise sources. We explain why the optimal annealing time is much longer than the coherence time of the individual qubits.
Entanglement lies at the core of quantum algorithms designed to solve problems that are intractable by classical approaches. One such algorithm, quantum annealing (QA), provides a promising path to a practical quantum processor. We have built a series of scalable QA processors consisting of networks of manufactured interacting spins (qubits). Here, we use qubit tunneling spectroscopy to measure the energy eigenspectrum of two- and eight-qubit systems within one such processor, demonstrating quantum coherence in these systems. We present experimental evidence that, during a critical portion of QA, the qubits become entangled and that entanglement persists even as these systems reach equilibrium with a thermal environment. Our results provide an encouraging sign that QA is a viable technology for large-scale quantum computing.
As superconducting quantum circuits scale to larger sizes, the problem of frequency crowding proves a formidable task. Here we present a solution for this problem in fixed-frequency qubit architectures. By systematically adjusting qubit frequencies post-fabrication, we show a nearly ten-fold improvement in the precision of setting qubit frequencies. To assess scalability, we identify the types of frequency collisions that will impair a transmon qubit and cross-resonance gate architecture. Using statistical modeling, we compute the probability of evading all such conditions, as a function of qubit frequency precision. We find that without post-fabrication tuning, the probability of finding a workable lattice quickly approaches 0. However with the demonstrated precisions it is possible to find collision-free lattices with favorable yield. These techniques and models are currently employed in available quantum systems and will be indispensable as systems continue to scale to larger sizes.
New annealing schedules for quantum annealing are proposed based on the adiabatic theorem. These schedules exhibit faster decrease of the excitation probability than a linear schedule. To derive this conclusion, the asymptotic form of the excitation probability for quantum annealing is explicitly obtained in the limit of long annealing time. Its first-order term, which is inversely proportional to the square of the annealing time, is shown to be determined only by the information at the initial and final times. Our annealing schedules make it possible to drop this term, thus leading to a higher order (smaller) excitation probability. We verify these results by solving numerically the time-dependent Schrodinger equation for small size systems
We have developed a quantum annealing processor, based on an array of tunably coupled rf-SQUID flux qubits, fabricated in a superconducting integrated circuit process [1]. Implementing this type of processor at a scale of 512 qubits and 1472 programmable inter-qubit couplers and operating at ~ 20 mK has required attention to a number of considerations that one may ignore at the smaller scale of a few dozen or so devices. Here we discuss some of these considerations, and the delicate balance necessary for the construction of a practical processor that respects the demanding physical requirements imposed by a quantum algorithm. In particular we will review some of the design trade-offs at play in the floor-planning of the physical layout, driven by the desire to have an algorithmically useful set of inter-qubit couplers, and the simultaneous need to embed programmable control circuitry into the processor fabric. In this context we have developed a new ultra-low power embedded superconducting digital-to-analog flux converters (DACs) used to program the processor with zero static power dissipation, optimized to achieve maximum flux storage density per unit area. The 512 single-stage, 3520 two-stage, and 512 three-stage flux-DACs are controlled with an XYZ addressing scheme requiring 56 wires. Our estimate of on-chip dissipated energy for worst-case reprogramming of the whole processor is ~ 65 fJ. Several chips based on this architecture have been fabricated and operated successfully at our facility, as well as two outside facilities (see for example [2]).
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