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Register a new userGeneralized Constant Current Method for Determining MOSFET Threshold Voltage
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A novel method for extracting threshold voltage and substrate effect parameters of MOSFETs with constant current bias at all levels of inversion is presented. This generalized constant-current (GCC) method exploits the charge-based model of MOSFETs to extract threshold voltage and other substrate-effect related parameters. The method is applicable over a wide range of current throughout weak and moderate inversion and to some extent in strong inversion. This method is particularly useful when applied for MOSFETs presenting edge conduction effect (subthreshold hump) in CMOS processes using Shallow Trench Isolation (STI).
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This paper presents a physics-based model for the threshold voltage in bulk MOSFETs valid from room down to cryogenic temperature (4.2 K). The proposed model is derived from Poissons equation including bandgap widening, intrinsic carrier-density scaling, and incomplete ionization. We demonstrate that accounting for incomplete ionization in the expression of the threshold voltage is critical for an accurate estimation of the current. The model is validated with our experimental results from nMOSFETs of a 28-nm CMOS process. The developed model is a key element for a cryo-CMOS compact model and can serve as a guide to optimize processes for high-performance cryo-computing and ultra-low-power quantum computing.
A gate voltage application in a Si-based spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) modulates spin accumulation voltages, where both electrical conductivity and drift velocity are modified while keeping constant electric current. An unprecedented reduction in the spin accumulation voltages in a Si spin MOSFET under negative gate voltage applications is observed in a high electric bias current regime. To support our claim, the electric bias current dependence of the spin accumulation voltage under the gate voltage applications is investigated in detail and compared to a spin drift diffusion model including the conductance mismatch effect. We proved that the drastic decrease of the mobility and spin lifetime in the Si channel is due to the optical phonon emission at the high electric bias current, which consequently reduced the spin accumulation voltage.
We compute the current voltage characteristic of a chain of identical Josephson circuits characterized by a large ratio of Josephson to charging energy that are envisioned as the implementation of topologically protected qubits. We show that in the limit of small coupling to the environment it exhibits a non-monotonous behavior with a maximum voltage followed by a parametrically large region where $Vpropto 1/I$. We argue that its experimental measurement provides a direct probe of the amplitude of the quantum transitions in constituting Josephson circuits and thus allows their full characterization.
We report measurements of transfer functions and flux shifts of 20 on-chip high T$_C$ DC SQUIDs half of which were made purposely geometrically asymmetric. All of these SQUIDs were fabricated using standard high T$_C$ thin film technology and they were single layer ones, having 140 nm thickness of YBa$_2$Cu$_3$O$_{7-x}$ film deposited by laser ablation onto MgO bicrystal substrates with 24$^0$ misorientation angle. For every SQUID the parameters of its intrinsic asymmetry, i. e., the density of critical current and resistivity of every junction, were measured directly and independently. We showed that the main reason for the on-chip spreading of SQUIDs voltage-current and voltage-flux characteristics was the intrinsic asymmetry. We found that for SQUIDs with a relative large inductance ($L>120 $ pH) both the voltage modulation and the transfer function were not very sensitive to the junctions asymmetry, whereas SQUIDs with smaller inductance ($Lsimeq 65-75 $ pH) were more sensitive. The results obtained in the paper are important for the implementation in the sensitive instruments based on high T$_C$ SQUID arrays and gratings.
In this letter, we present a study of optimized TMR magnetic field sensors as a function of voltage bias. The 1/f low-frequency noise is quantified by the Hooge-like parameter {alpha} which allows to compare the low-frequency behavior of various TMR sensors. The sensitivity as well as the detectivity of the sensor are characterized in the parallel state and at 0 mT. We observe that the sensitivity shows a strong voltage dependence and the noise presents an unexpected decrease, not anticipated by the Hooges law. Moreover, surprisingly, an almost stable detectivity (140-200 nT/sqrt(Hz) at 10 Hz and 15-20 nT/sqrt(Hz) at 1 kHz) as a function of the bias voltage is observed, tending to highlight that the variation of sensitivity and noise are correlated. Even if the I-V curves are strongly non-linear and reflect the different symmetries of the conduction bands channels, the variations in sensitivity and noise seems to depend mainly on the distortion of the MgO barrier due to bias voltage. With a simple model where the normal noise and sensitivity of the TMR sensors are modified by an element having no noise and a parabolic conductance with voltage, we describe the behavior of noise and sensitivity from mV to V.
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