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Coexistence of distinct skyrmion phases observed in hybrid ferromagnetic/ferrimagnetic multilayers

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 Added by Andrada-Oana Mandru
 Publication date 2020
  fields Physics
and research's language is English




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Materials hosting magnetic skyrmions at room temperature could enable new computing architectures as well as compact and energetically efficient magnetic storage such as racetrack memories. In a racetrack device, information is coded by the presence/absence of magnetic skyrmions forming a chain that is moved through the device. The skyrmion Hall effect that would eventually lead to an annihilation of the skyrmions at the edges of the racetrack can be suppressed for example by anti-ferromagnetically-coupled skyrmions. However, avoiding modifications of the inter-skyrmion distances in the racetrack remains challenging. As a solution to this issue, a chain of bits could also be encoded by two different solitons such as a skyrmion and a chiral bobber. The major limitation of this approach is that it has solely been realized in B20-type single crystalline material systems that support skyrmions only at low temperatures, thus hindering the efficacy for future applications. Here we demonstrate that a hybrid ferro/ferri/ferromagnetic multilayer system can host two distinct skyrmion phases at room temperature. By matching quantitative magnetic force microscopy data with micromagnetic simulations, we reveal that the two phases represent tubular skyrmions and partial skyrmions (similar to skyrmion bobbers). Furthermore, the tubular skyrmion can be converted into a partial skyrmion. Such multilayer systems may thus serve as a platform for designing skyrmion memory applications using distinct types of skyrmions and potentially for storing information using the vertical dimension in a thin film device.



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Magnetic skyrmions are promising for building next-generation magnetic memories and spintronic devices due to their stability, small size and the extremely low currents needed to move them. In particular, skyrmion-based racetrack memory is attractive for information technology, where skyrmions are used to store information as data bits instead of traditional domain walls. Here we numerically demonstrate the impacts of skyrmion-skyrmion and skyrmion-edge repulsions on the feasibility of skyrmion-based racetrack memory. The reliable and practicable spacing between consecutive skyrmionic bits on the racetrack as well as the ability to adjust it are investigated. Clogging of skyrmionic bits is found at the end of the racetrack, leading to the reduction of skyrmion size. Further, we demonstrate an effective and simple method to avoid the clogging of skyrmionic bits, which ensures the elimination of skyrmionic bits beyond the reading element. Our results give guidance for the design and development of future skyrmion-based racetrack memory.
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