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Register a new userImproving performance of logical qubits by parameter tuning and topology compensation
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Optimization or sampling of arbitrary pairwise Ising models, in a quantum annealing protocol of constrained interaction topology, can be enabled by a minor-embedding procedure. The logical problem of interest is transformed to a physical (device programmable) problem, where one binary variable is represented by a logical qubit consisting of multiple physical qubits. In this paper we discuss tuning of this transformation for the cases of clique, biclique, and cubic lattice problems on the D-Wave 2000Q quantum computer. We demonstrate parameter tuning protocols in spin glasses and channel communication problems, focusing on anneal duration, chain strength, and mapping from the result on physical qubits back to the logical space. Inhomogeneities in effective coupling strength arising from minor-embedding are shown to be mitigated by an efficient reweighting of programmed couplings, accounting for logical qubit topology.
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We present a quantum error correcting code with dynamically generated logical qubits. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, our measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Our particular code gives a model very similar to the two-dimensional toric code, but each measurement is a two-qubit Pauli measurement.
We consider a notion of relative homology (and cohomology) for surfaces with two types of boundaries. Using this tool, we study a generalization of Kitaevs code based on surfaces with mixed boundaries. This construction includes both Bravyi and Kitaevs and Freedman and Meyers extension of Kitaevs toric code. We argue that our generalization offers a denser storage of quantum information. In a planar architecture, we obtain a three-fold overhead reduction over the standard architecture consisting of a punctured square lattice.
Future quantum computers will require quantum error correction for faithful operation. The correction capabilities come with an overhead for performing fault-tolerant logical operations on the encoded qubits. One of the most resource efficient ways to implement logical operations is lattice surgery, where groups of physical qubits, arranged on lattices, can be merged and split to realize entangling gates and teleport logical information. Here, we report on the experimental realization of lattice surgery between two topologically encoded qubits in a 10-qubit ion trap quantum information processor. In particular, we demonstrate entanglement between two logical qubits and we implement logical state teleportation.
Systematic errors are inevitable in most measurements performed in real life because of imperfect measurement devices. Reducing systematic errors is crucial to ensuring the accuracy and reliability of measurement results. To this end, delicate error-compensation design is often necessary in addition to device calibration to reduce the dependence of the systematic error on the imperfection of the devices. The art of error-compensation design is well appreciated in nuclear magnetic resonance system by using composite pulses. In contrast, there are few works on reducing systematic errors in quantum optical systems. Here we propose an error-compensation design to reduce the systematic error in projective measurements on a polarization qubit. It can reduce the systematic error to the second order of the phase errors of both the half-wave plate (HWP) and the quarter-wave plate (QWP) as well as the angle error of the HWP. This technique is then applied to experiments on quantum state tomography on polarization qubits, leading to a 20-fold reduction in the systematic error. Our study may find applications in high-precision tasks in polarization optics and quantum optics.
Perfect state transfer (PST) is discussed in the context of passive quantum networks with logical bus topology, where many logical nodes communicate using the same shared media, without any external control. The conditions under which, a number of point-to-point PST links may serve as building blocks for the design of such multi-node networks are investigated. The implications of our results are discussed in the context of various Hamiltonians that act on the entire network, and are capable of providing PST between the logical nodes of a prescribed set in a deterministic manner.
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