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Register a new userA custom readout electronics for the BESIII CGEM detector
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Added by
Manuel Dionisio Da Rocha Rolo
Publication date
2017
fields
Physics
and research's language is
English
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For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under development. The analogue readout of the CGEM enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 um while loosening the pitch strip to 650 um, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, providing a time and charge measurement and featuring a fully-digital output. The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates in excess of 60 kHz per channel. The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a CSA and CR-RC2 shapers, dominate the channel intrinsic time jitter, which is less than 5 ns r.m.s.. The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad. Event data is collected by an off-detector motherboard, where each GEM-ROC readout card handles 4 ASIC carrier PCBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data collector cards are managed by bi-directional fibre optical links.
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An innovative Cylindrical Gas Electron Multiplier (CGEM) detector is under construction for the upgrade of the inner tracker of the BESIII experiment. A novel system has been worked out for the readout of the CGEM detector, including a new ASIC, dubbed TIGER -Torino Integrated GEM Electronics for Readout, designed for the amplification and digitization of the CGEM output signals. The data output by TIGER are collected and processed by a first FPGA-based module, GEM Read Out Card, in charge of configuration and control of the front-end ASICs. A second FPGA-based module, named GEM Data Concentrator, builds the trigger selected event packets containing the data and stores them via the main BESIII data acquisition system. The design of the electronics chain, including the power and signal distribution, will be presented together with its performance.
The Silicon Tracker (STK) is a detector of the DAMPE satellite to measure the incidence direction of high energy cosmic ray. It consists of 6 X-Y double layers of silicon micro-strip detectors with 73,728 readout channels. Its a great challenge to readout the channels and process the huge volume of data in the critical space environment. 1152 Application Specific Integrated Circuits (ASIC) and 384 ADCs are adopted to readout the detector channels. The 192 Tracker Front-end Hybrid (TFH) modules and 8 identical Tracker Readout Board (TRB) modules are designed to control and digitalize the front signals. In this paper, the design of the readout electronics for STK and its performance will be presented in detail.
The third generation of the Beijing Electron Spectrometer, BESIII, is an apparatus for high energy physics research. The hunting of new particles and the measurement of their properties or the research of rare processes are sought to understand if the measurements confirm the Standard Model and to look for physics beyond it. The detectors ensure the reconstruction of events belonging to the sub-atomic domain. The operation and the efficiency of the BESIII inner tracker is compromised due to the the radiation level of the apparatus. A new detector is needed to guarantee better performance and to improve the physics research. A cylindrical triple-GEM detector (CGEM) is an answer to this need: it will maintain the excellent performance of the inner tracker while improving the spatial resolution in the beam direction allowing a better reconstruction of secondary vertices. The technological challenge of the CGEM is related in its spatial limitation and the needed cylindrical shape. At the same time the detector has to ensure an efficiency close to 1 and a stable spatial resolution better than 150 $mu$m, independently from the track incident angle and the presence of 1 T magnetic field. In the years 2014-2018 the CGEM-IT has been designed and built. Through several test beam and simulations the optimal configuration from the geometrical and electrical points of view has been found. This allows to measure the position of the charged particle interacting with the CGEM-IT. Two algorithms have been used for this purpose, the charge centroid and the $mu$TPC, a new technique introduced by ATLAS in MicroMegas and developed here for the first time for triple-GEM detector. A complete triple-GEM simulation software has been developed to improve the knowledge of the detection processes. The software reproduces the CGEM-IT behavior in the BESIII offline software.
The proposed Circular Electron Positron Collider (CEPC) imposes new challenges for the vertex detector in terms of high resolution, low material, fast readout and low power. The Monolithic Active Pixel Sensor (MAPS) technology has been chosen as one of the most promising candidates to satisfy these requirements. A MAPS prototype, called TaichuPix1, based on a data-driven structure, together with a column drain readout architecture, benefiting from the ALPIDE and FE-I3 approaches, has been implemented to achieve fast readout. This paper presents the overall architecture of TaichuPix1, the experimental characterization of the FE-I3-like matrix, the threshold dispersion, the noise distribution of the pixels and verifies the charge collection using a radioactive source. These results prove the functionality of the digital periphery and serializer are able to transmit the collected charge to the data interface correctly. Moreover, the individual self-tests of the serializer verify it can work up to about 3 Gbps. And it also indicates that the analog front-end features a fast-rising signal with a short time walk and that the FE-I3-like in-pixel digital logic is properly operating at the 40 MHz system clock.
The STEREO experiment will search for a sterile neutrino by measuring the anti-neutrino energy spectrum as a function of the distance from the source, the ILL nuclear reactor. A dedicated electronic system, hosted in a single microTCA crate, was designed for this experiment. It performs triggering in two stages with various selectable conditions, processing and readout via UDP/IPBUS of 68 photomultiplier signals continuously digitized at 250 MSPS. Additionally, for detector performance monitoring, the electronics allow on-line calibration by driving LED synchronously with the data acquisition. This paper describes the electronics requirements, architecture and the performances achieved.
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