No Arabic abstract
The extremely high carrier mobility and the unique band structure, make graphene very useful for field-effect transistor applications. According to several works, the primary limitation to graphene based transistor performance is not related to the material quality, but to extrinsic factors that affect the electronic transport properties. One of the most important parasitic element is the contact resistance appearing between graphene and the metal electrodes functioning as the source and the drain. Ohmic contacts to graphene, with low contact resistances, are necessary for injection and extraction of majority charge carriers to prevent transistor parameter fluctuations caused by variations of the contact resistance. The International Technology Roadmap for Semiconductors, toward integration and down-scaling of graphene electronic devices, identifies as a challenge the development of a CMOS compatible process that enables reproducible formation of low contact resistance. However, the contact resistance is still not well understood despite it is a crucial barrier towards further improvements. In this paper, we review the experimental and theoretical activity that in the last decade has been focusing on the reduction of the contact resistance in graphene transistors. We will summarize the specific properties of graphene-metal contacts with particular attention to the nature of metals, impact of fabrication process, Fermi level pinning, interface modifications induced through surface processes, charge transport mechanism, and edge contact formation.
We report a systematic study of the contact resistance present at the interface between a metal (Ti) and graphene layers of different, known thickness. By comparing devices fabricated on 11 graphene flakes we demonstrate that the contact resistance is quantitatively the same for single-, bi-, and tri-layer graphene ($sim800 pm 200 Omega mu m$), and is in all cases independent of gate voltage and temperature. We argue that the observed behavior is due to charge transfer from the metal, causing the Fermi level in the graphene region under the contacts to shift far away from the charge neutrality point.
We study the contact resistance and the transfer characteristics of back-gated field effect transistors of mono- and bi-layer graphene. We measure specific contact resistivity of ~7kohm*um2 and ~30kohm*um2 for Ni and Ti, respectively. We show that the contact resistance is a significant contributor to the total source-to-drain resistance and it is modulated by the back-gate voltage. We measure transfer characteristics showing double dip feature that we explain as the effect of doping due to charge transfer from the contacts causing minimum density of states for graphene under the contacts and in the channel at different gate voltage.
Confinement and edge structures are known to play significant roles in electronic and transport properties of two-dimensional materials. Here, we report on low-temperature magnetotransport measurements of lithographically patterned graphene cavity nanodevices. It is found that the evolution of the low-field magnetoconductance characteristics with varying carrier density exhibits different behaviors in graphene cavity and bulk graphene devices. In the graphene cavity devices, we have observed that intravalley scattering becomes dominant as the Fermi level gets close to the Dirac point. We associate this enhanced intravalley scattering to the effect of charge inhomogeneities and edge disorder in the confined graphene nanostructures. We have also observed that the dephasing rate of carriers in the cavity devices follows a parabolic temperature dependence, indicating that the direct Coulomb interaction scattering mechanism governs the dephasing at low temperatures. Our results demonstrate the importance of confinement in carrier transport in graphene nanostructure devices.
The field-effect mobility of graphene devices is discussed. We argue that the graphene ballistic mean free path can only be extracted by taking into account both, the electrical characteristics and the channel length dependent mobility. In doing so we find a ballistic mean free path of 300nm at room-temperature for a carrier concentration of ~1e12/cm2 and that a substantial series resistance of around 300ohmum has to be taken into account. Furthermore, we demonstrate first quantum capacitance measurements on single-layer graphene devices.
We have performed a metrological characterization of the quantum Hall resistance in a 1 $mu$m wide graphene Hall-bar. The longitudinal resistivity in the center of the $ u=pm 2$ quantum Hall plateaus vanishes within the measurement noise of 20 m$Omega$ upto 2 $mu$A. Our results show that the quantization of these plateaus is within the experimental uncertainty (15 ppm for 1.5$ mu$A current) equal to that in conventional semiconductors. The principal limitation of the present experiments are the relatively high contact resistances in the quantum Hall regime, leading to a significantly increased noise across the voltage contacts and a heating of the sample when a high current is applied.