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Register a new userA Physical Unclonable Function with Redox-based Nanoionic Resistive Memory
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A unique set of characteristics are packed in emerging nonvolatile reduction-oxidation (redox)-based resistive switching memories (ReRAMs) such as their underlying stochastic switching processes alongside their intrinsic highly nonlinear current-voltage characteristic, which in addition to known nano-fabrication process variation make them a promising candidate for the next generation of low-cost, low-power, tiny and secure Physically Unclonable Functions (PUFs). This paper takes advantage of this otherwise disadvantageous ReRAM feature using a combination of novel architectural and peripheral circuitry. We present a physical one-way function, nonlinear resistive Physical Unclonable Function (nrPUF), potentially applicable in variety of cyber-physical security applications given its performance characteristics. We experimentally verified performance of Valency Change Mechanism (VCM)-based ReRAM in nano-fabricated crossbar arrays across multiple dies and runs. In addition to a massive pool of Challenge-Response Pairs (CRPs), using a combination of experimental and simulation, our proposed PUF shows a reliability of 98.67%, a uniqueness of 49.85%, a diffuseness of 49.86%, a uniformity of 47.28%, and a bit-aliasing of 47.48%.
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This paper introduces the concept of spin-orbit-torque-MRAM (SOT-MRAM) based physical unclonable function (PUF). The secret of the PUF is stored into a random state of a matrix of perpendicular SOT-MRAMs. Here, we show experimentally and with micromagnetic simulations that this random state is driven by the intrinsic nonlinear dynamics of the free layer of the memory excited by the SOT. In detail, a large enough current drives the magnetization along an in-plane direction. Once the current is removed, the in-plane magnetic state becomes unstable evolving towards one of the two perpendicular stable configurations randomly. In addition, an hybrid CMOS/spintronics model is used to evaluate the electrical characteristics of a PUF realized with an array of 16x16 SOT-MRAM cells. Beyond robustness against voltage and temperature variations, hardware authentication based on this PUF scheme has additional advantages over other PUF technologies such as non-volatility (no power consumption in standby mode), reconfigurability (the secret can be rewritten), and scalability. We believe that this work is a step forward the design of spintronic devices for application in security.
Physical unclonable functions (PUFs) exploit the intrinsic complexity and irreproducibility of physical systems to generate secret information. PUFs have the potential to provide fundamentally higher security than traditional cryptographic methods by preventing the cloning of identities and the extraction of secret keys. One unique and exciting opportunity is that of using the super-high information content (SHIC) capability of nanocrossbar architecture as well as the high resistance programming variation of resistive memories to develop a highly secure on-chip PUFs for extremely resource constrained devices characterized by limited power and area budgets such as passive Radio Frequency Identification (RFID) devices. We show how to implement PUF based on nano-scale memristive (resistive memory) devices (mrPUF). Our proposed architecture significantly increased the number of possible challenge-response pairs (CRPs), while also consuming relatively lesser power (around 70 uW). The presented approach can be used in other silicon-based PUFs as well.
We extend the reach of temporal computing schemes by developing a memory for multi-channel temporal patterns or wavefronts. This temporal memory re-purposes conventional one-transistor-one-resistor (1T1R) memristor crossbars for use in an arrival-time coded, single-event-per-wire temporal computing environment. The memristor resistances and the associated circuit capacitances provide the necessary time constants, enabling the memory array to store and retrieve wavefronts. The retrieval operation of such a memory is naturally in the temporal domain and the resulting wavefronts can be used to trigger time-domain computations. While recording the wavefronts can be done using standard digital techniques, that approach has substantial translation costs between temporal and digital domains. To avoid these costs, we propose a spike timing dependent plasticity (STDP) inspired wavefront recording scheme to capture incoming wavefronts. We simulate these designs with experimentally validated memristor models and analyze the effects of memristor non-idealities on the operation of such a memory.
The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a major lead for reducing the energy consumption of artificial intelligence (AI). Multiple works have for example proposed in-memory architectures to implement low power binarized neural networks. These simple neural networks, where synaptic weights and neuronal activations assume binary values, can indeed approach state-of-the-art performance on vision tasks. In this work, we revisit one of these architectures where synapses are implemented in a differential fashion to reduce bit errors, and synaptic weights are read using precharge sense amplifiers. Based on experimental measurements on a hybrid 130 nm CMOS/RRAM chip and on circuit simulation, we show that the same memory array architecture can be used to implement ternary weights instead of binary weights, and that this technique is particularly appropriate if the sense amplifier is operated in near-threshold regime. We also show based on neural network simulation on the CIFAR-10 image recognition task that going from binary to ternary neural networks significantly increases neural network performance. These results highlight that AI circuits function may sometimes be revisited when operated in low power regimes.
We show that many delay-based reservoir computers considered in the literature can be characterized by a universal master memory function (MMF). Once computed for two independent parameters, this function provides linear memory capacity for any delay-based single-variable reservoir with small inputs. Moreover, we propose an analytical description of the MMF that enables its efficient and fast computation. Our approach can be applied not only to reservoirs governed by known dynamical rules such as Mackey-Glass or Ikeda-like systems but also to reservoirs whose dynamical model is not available. We also present results comparing the performance of the reservoir computer and the memory capacity given by the MMF.
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