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Scalable gate architecture for densely packed semiconductor spin qubits

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 Added by Jason Petta
 Publication date 2016
  fields Physics
and research's language is English




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We demonstrate a 12 quantum dot device fabricated on an undoped Si/SiGe heterostructure as a proof-of-concept for a scalable, linear gate architecture for semiconductor quantum dots. The device consists of 9 quantum dots in a linear array and 3 single quantum dot charge sensors. We show reproducible single quantum dot charging and orbital energies, with standard deviations less than 20% relative to the mean across the 9 dot array. The single quantum dot charge sensors have a charge sensitivity of 8.2 x 10^{-4} e/root(Hz) and allow the investigation of real-time charge dynamics. As a demonstration of the versatility of this device, we use single-shot readout to measure a spin relaxation time T1 = 170 ms at a magnetic field B = 1 T. By reconfiguring the device, we form two capacitively coupled double quantum dots and extract a mutual charging energy of 200 microeV, which indicates that 50 GHz two-qubit gate operation speeds are feasible.



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In recent years semiconducting qubits have undergone a remarkable evolution, making great strides in overcoming decoherence as well as in prospects for scalability, and have become one of the leading contenders for the development of large-scale quantum circuits. In this Review we describe the current state of the art in semiconductor charge and spin qubits based on gate-controlled semiconductor quantum dots, shallow dopants, and color centers in wide band gap materials. We frame the relative strengths of the different semiconductor qubit implementations in the context of quantum simulations, computing, sensing and networks. By highlighting the status and future perspectives of the basic types of semiconductor qubits, this Review aims to serve as a technical introduction for non-specialists as well as a forward-looking reference for scientists intending to work in this field.
233 - D. M. Zajac , T. M. Hazard , X. Mi 2015
We demonstrate a reconfigurable quantum dot gate architecture that incorporates two interchangeable transport channels. One channel is used to form quantum dots and the other is used for charge sensing. The quantum dot transport channel can support either a single or a double quantum dot. We demonstrate few-electron occupation in a single quantum dot and extract charging energies as large as 6.6 meV. Magnetospectroscopy is used to measure valley splittings in the range of 35-70 microeV. By energizing two additional gates we form a few-electron double quantum dot and demonstrate tunable tunnel coupling at the (1,0) to (0,1) interdot charge transition.
We present efficient methods to reliably characterize and tune gate-defined semiconductor spin qubits. Our methods are designed to target the tuning procedures of semiconductor double quantum dot in GaAs heterostructures, but can easily be adapted to other quantum-dot-like qubit systems. These tuning procedures include the characterization of the inter-dot tunnel coupling, the tunnel coupling to the surrounding leads and the identification of the various fast initialization points for the operation of the qubit. Since semiconductor-based spin qubits are compatible with standard semiconductor process technology and hence promise good prospects of scalability, the challenge of efficiently tuning the dots parameters will only grow in the near future, once the multi-qubit stage is reached. With the anticipation of being used as the basis for future automated tuning protocols, all measurements presented here are fast-to-execute and easy-to-analyze characterization methods. They result in quantitative measures of the relevant qubit parameters within a couple of seconds, and require almost no human interference.
Full-scale quantum computers require the integration of millions of quantum bits. The promise of leveraging industrial semiconductor manufacturing to meet this requirement has fueled the pursuit of quantum computing in silicon quantum dots. However, to date, their fabrication has relied on electron-beam lithography and, with few exceptions, on academic style lift-off processes. Although these fabrication techniques offer process flexibility, they suffer from low yield and poor uniformity. An important question is whether the processing conditions developed in the manufacturing fab environment to enable high yield, throughput, and uniformity of transistors are suitable for quantum dot arrays and do not compromise the delicate qubit properties. Here, we demonstrate quantum dots hosted at a 28Si/28SiO2 interface, fabricated in a 300 mm semiconductor manufacturing facility using all-optical lithography and fully industrial processing. As a result, we achieve nanoscale gate patterns with remarkable homogeneity. The quantum dots are well-behaved in the multi-electron regime, with excellent tunnel barrier control, a crucial feature for fault-tolerant two-qubit gates. Single-spin qubit operation using magnetic resonance reveals relaxation times of over 1 s at 1 Tesla and coherence times of over 3 ms, matching the quality of silicon spin qubits reported to date. The feasibility of high-quality qubits made with fully-industrial techniques strongly enhances the prospects of a large-scale quantum computer
We introduce an always-on, exchange-only qubit made up of three localized semiconductor spins that offers a true sweet spot to fluctuations of the quantum dot energy levels. Both single- and two-qubit gate operations can be performed using only exchange pulses while maintaining this sweet spot. We show how to interconvert this qubit to other three-spin encoded qubits as a new resource for quantum computation and communication.
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