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Register a new userResults of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype
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Added by
Sergio Gonzalez Sevilla
Publication date
2016
fields
Physics
and research's language is
English
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Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.
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HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the $4^{mathrm{th}}$ generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between $1cdot 10^{14}$ and $5cdot 10^{15}$ 1-MeV-n$_textrm{eq}$/cm$^2$. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of $85,$V. The sample irradiated to a fluence of $1cdot 10^{15}$ n$_textrm{eq}$/cm$^2$ - a relevant value for a large volume of the upgraded tracker - exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.
High-Voltage Monolithic Active Pixel Sensors (HV-MAPS) based on the 180 nm HV-CMOS process have been proposed to realize thin, fast and highly integrated pixel sensors. The MuPix7 prototype, fabricated in the commercial AMS H18 process, features a fully integrated on-chip readout, i.e. hit-digitization, zero suppression and data serialization. It is the first fully monolithic HV-CMOS pixel sensor that has been tested for the use in high irradiation environments like HL-LHC. We present results from laboratory and test beam measurements of MuPix7 prototypes irradiated with neutrons (up to $5.0cdot10^{15}{,rm{n}_{rm{eq}}/cm^2}$) and protons (up to $7.8cdot 10^{15} ,rm{protons}/cm^2$) and compare the performance with non-irradiated sensors. Efficiencies well above 90 % at noise rates below 200 Hz per pixel are measured. A time resolution better than 22 ns is measured for all tested settings and sensors, even at the highest irradiation fluences. The data transmission at 1.25 Gbit/s and the on-chip PLL remain fully functional.
Conventional CMOS technology operated at cryogenic conditions has recently attracted interest for its uses in low-noise electronics. We present one of the first characterizations of 180 nm CMOS technology at a temperature of 100 mK, extracting I/V characteristics, threshold voltages, and transconductance values, as well as observing their temperature dependence. We find that CMOS devices remain fully operational down to these temperatures, although we observe hysteresis effects in some devices. The measurements described in this paper can be used to inform the future design of CMOS devices intended to be operated in this deep cryogenic regime.
Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut fur Technologie (KIT), Institut de Fisica dAltes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V.
Purpose: CMOS pixel sensors have become extremely attractive for future high performance tracking devices. Initial R&D work has been conducted for the vertex detector for the proposed Circular Electron Positron Collider that will allow precision Higgs measurements. It is critical to achieve low power consumption to minimize the material budget. This requires careful optimization of the sensor diode geometry to reach high charge-over-capacitance that allows reduction in analog power consumption. Methods: The electrode area and footprint are two critical elements in sensor diode geometry and have deciding impacts on the sensor charge collection performance. Prototype CMOS pixel sensor JadePix-1 has been developed with pixel sectors implementing different electrode area and footprint and their charge collection performance has been characterized with radioactive resources. Results: Charge-to-voltage conversion gains are calibrated with low energy X-ray. Noise, charge collection efficiency, charge-over-capacitance and signal-to-noise ratio are obtained for pixel sectors of different electrode area and footprint. Conclusion: Small electrode area and large footprint are preferred to achieve high charge-over-capacitance that promises low analog power consumption. Ongoing studies on sensor performance before and after irradiation, combined with this work, will conclude on the diode geometry optimization.
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