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Register a new userDiameter Dependence of the Transport Properties of Antimony Telluride Nanowires
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We report measurements of electronic, thermoelectric, and galvanomagnetic properties of individual single crystal antimony telluride (Sb2Te3) nanowires with diameters in the range of 20-100 nm. Temperature dependent resistivity and thermoelectric power (TEP) measurements indicate hole dominant diffusive thermoelectric generation, with an enhancement of the TEP for smaller diameter wires up to 110 uV/K at T = 300 K. We measure the magnetoresistance, in magnetic fields both parallel and perpendicular to the nanowire [110] axis, where strong anisotropic positive magnetoresistance behavior was observed.
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Nanowires (NWs) with their quasi-one-dimensionality often present different structural and opto-electronic properties than their thin-film counterparts. The thinner they are the larger these differences are, in particular in the carrier-phonon scattering and thermal conductivity. In this work, we present femtosecond transient absorbance measurements on GaAs0.8P0.2 NWs of two different diameters, 36 and 51 nm. The results show that thinner NWs sustain the hot-carriers at a higher temperature for longer times than thicker NWs. We explain the observation suggesting that in thinner NWs, the build-up of a hot-phonon bottleneck is easier than in thicker NWs because of the increased phonon scattering at the NW sidewalls which facilitates the build-up of a large phonon density. The large number of optical phonons emitted during the carrier relaxation processes generate a non-equilibrium population of acoustic phonons that propagates less efficiently in thin NWs. This makes the possible acoustic-to-optical phonon up-conversion process easier, which prolongs the LO phonon lifetime resulting in the slowdown of the carrier cooling. The important observation that the carrier temperature in thin NWs is higher than in thick NWs already at the beginning of the hot carrier regime suggests that the phonon-mediated scattering processes in the non-thermal regime play a major role at least for the carrier densities investigated here (8x1018-4x1019 cm-3). Our results also suggest that the boundary scattering of phonons at crystal defects is negligible compared to the surface scattering at the NW sidewalls.
This paper has been withdrawn by the author.
In this paper we review the theory of silicon nanowires. We focus on nanowires with diameters below 10 nm, where quantum effects become important and the properties diverge significantly from those of bulk silicon. These wires can be efficiently treated within electronic structure simulation methods and will be among the most important functional blocks of future nanoelectronic devices. Firstly, we review the structural properties of silicon nanowires, emphasizing the close connection between the growth orientation, the cross-section and the bounding facets. Secondly, we discuss the electronic structure of pristine and doped nanowires, which hold the ultimate key for their applicability in novel electronic devices. Finally, we review transport properties where some of the most important limitations in the performances of nanowire-based devices can lay. Many of the unique properties of these systems are at the same time defying challenges and opportunities for great technological advances.
Multilayer graphene (MLG) thin films are deposited on silicon oxide substrates by mechanical exfoliation (or scotch-tape method) from Kish graphite. The thickness and number of layers are determined from both Atomic Force Microscopy (AFM) and Raman Spectroscopy. Electrical terminals are deposited on MLGs in a four-probe configuration by electron-beam lithography, gold/titanium thermal evaporation, and lift-off. The electrical resistance is measured from room temperature down to 2 K. The electrical resistance of the MLGs shows an increase with decreasing temperature, and then decreases after reaching a maximum value. These results are compared with recent experimental and theoretical data from the literature.
Bardeens model for the non-ideal metal-semiconductor interface was applied to metal-wrapped cylindrical nanowire systems; a significant effect of the nanowire diameter on the non-ideal Schottky barrier height was found. The calculations were performed by solving Poissons equation in the nanowire, self-consistently with the constraints set by the non-ideal interface conditions; in these calculations the barrier height is obtained from the solution, and it is not a boundary condition for Poissons equation. The main finding is that thin nanowires are expected to have tens of meV higher Schottky barriers compared to their thicker counterparts. What lies behind this effect is the electrostatic properties of metal-wrapped nanowires; in particular, since depletion charge is reduced with nanowire radius, the potential drop on the interfacial layer, is reduced - leading to the increase of the barrier height with nanowire radius reduction.
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