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The upgraded CERN LHCb detector, due to start data taking in 2021, will have to reconstruct 4 TB/s of raw detector data in real time using commodity processors. This is one of the biggest real-time data processing challenges in any scientific domain. We present an intrinsically parallel reconstruction algorithm for the vertex detector of the LHCb experiment designed to optimally exploit multi-core general purpose architectures. We compare it to previous state-of-the-art scalar pattern recognition algorithms and show significantly faster processing and in some cases increased physics performance over all current alternatives. We evaluate the algorithm on two high-end architectures from two different vendors and discuss in detail the impact of different SIMD Instruction Set Architecture extensions on the performance.
An extensive sensor testing campaign is presented, dedicated to measuring the charge collection properties of prototype candidates for the Vertex Locator (VELO) detector for the upgraded LHCb experiment. The charge collection is measured with sensors
We describe the Hybrid seeding, a standalone pattern recognition algorithm aiming at finding charged particle trajectories for the LHCb upgrade. A significant improvement to the charged particle reconstruction efficiency is accomplished by exploiting
LHC will offer the opportunity of probing the mass scale of the electro-weak symmetry breaking. Thus we expect to uncover direct manifestations of physics beyond the Standard Model, which will raise new questions that may be elucidated by precision m
The Large Hadron Collider beauty (LHCb) detector is designed to detect decays of b- and c- hadrons for the study of CP violation and rare decays. At the end of the LHC Run 2, many of the LHCb measurements remained statistically dominated. In order to
The LHCb VELO Timepix3 telescope is a silicon pixel tracking system constructed initially to evaluate the performance of LHCb VELO Upgrade prototypes. The telesope consists of eight hybrid pixel silicon sensor planes equipped with the Timepix3 ASIC.