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Ising machines use physics to naturally guide a dynamical system towards an optimal state which can be read out as a heuristical solution to a combinatorial optimization problem. Such designs that use nature as a computing mechanism can lead to higher performance and/or lower operation costs. Quantum annealers are a prominent example of such efforts. However, existing Ising machines are generally bulky and energy intensive. Such disadvantages might lead to intrinsic advantages at some larger scale in the future. But for now, integrated electronic designs allow more immediate applications. We propose one such design that uses bistable nodes, coupled with programmable and variable strengths. The design is fully CMOS compatible for on-chip applications and demonstrates competitive solution quality and significantly superior execution time and energy.
We introduce a methodology for generating benchmark problem sets for Ising machines---devices designed to solve discrete optimization problems cast as Ising models. In our approach, linear systems of equations are cast as Ising cost functions. While
A coherent Ising machine (CIM) is a network of optical parametric oscillators (OPOs), in which the strongest collective mode of oscillation at well above threshold corresponds to an optimum solution of a given Ising problem. When a pump rate or netwo
A new technique is demonstrated for carrying out exact positive-P phase-space simulations of the coherent Ising machine quantum computer. By suitable design of the coupling matrix, general hard optimization problems can be solved. Here, quantum simul
The increasing complexity of Internet-of-Things (IoT) applications and near-sensor processing algorithms is pushing the computational power of low-power, battery-operated end-node systems. This trend also reveals growing demands for high-speed and en
The coherent Ising machine is expected to find a near-optimal solution in various combinatorial optimization problems, which has been experimentally confirmed with optical parametric oscillators (OPOs) and a field programmable gate array (FPGA) circu