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Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm$^2$ chips. Increasing the integration scale further is challenging because of the large area of SFQ logic cells, mainly determined by the area of resistively shunted Nb/AlO$_x$-Al/Nb JJs and geometrical inductors utilizing multiple layers of Nb. To overcome these challenges, we are developing a fabrication process with self-shunted high-J$_c$ JJs and compact thin-film MoN$_x$ kinetic inductors instead of geometrical inductors. We present fabrication details and properties of MoN$_x$ films with a wide range of T$_c$, including residual stress, electrical resistivity, critical current, and magnetic field penetration depth {lambda}$_0$. As kinetic inductors, we implemented Mo$_2$N films with T$_c$ about 8 K, {lambda}$_0$ about 0.51 {mu}m, and inductance adjustable in the range from 2 to 8 pH/sq. We also present data on fabrication and electrical characterization of Nb-based self-shunted JJs with AlO$_x$ tunnel barriers and J$_c$ = 0.6 mA/{mu}m$^2$, and with 10-nm thick Si$_{1-x}$Nb$_x$ barriers, with x from 0.03 to 0.15, fabricated on 200-mm wafers by co-sputtering. We demonstrate that the electron transport mechanism in Si$_{1-x}$Nb$_x$ barriers at x < 0.08 is inelastic resonant tunneling via chains of multiple localized states. At larger x, their Josephson characteristics are strongly dependent on x and residual stress in Nb electrodes, and in general are inferior to AlO$_x$ tunnel barriers.
Conventional Josephson metal-insulator-metal devices are inherently underdamped and exhibit hysteretic current-voltage response due to a very high subgap resistance compared to that in the normal state. At the same time, overdamped junctions with sin
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junctions, and one layer of MoNx kinetic inductors. The minimum feature si
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-mm wafers. The two junction layers can be, e.g., conventional Supercond
Magnetic flux quantization in superconductors allows the implementation of fast and energy-efficient digital superconducting circuits. However, the information representation in magnetic flux severely limits their functional density presenting a long
We present a cluster algorithm for resistively shunted Josephson junctions and similar physical systems, which dramatically improves sampling efficiency. The algorithm combines local updates in Fourier space with rejection-free cluster updates which