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The Speedster-EXD is a new 64x64 pixel, 40 $mu$m pixel pitch, 100 $mu$m depletion depth hybrid CMOS X-ray detector (HCD) with the capability of reading out only those pixels containing event charge, thus enabling fast effective frame rates. A global charge threshold can be specified, and pixels containing charge above this threshold are flagged and read out. The Speedster detector has also been designed with other advanced in-pixel features to improve performance, including a low-noise, high-gain CTIA amplifier that eliminates interpixel capacitance crosstalk (IPC), and in-pixel Correlated Double Sampling (CDS) subtraction to reduce reset noise. We measure the best energy resolution on the Speedster-EXD detector to be 206 eV (3.5 %) at 5.89 keV and 172 eV (10.0 %) at 1.49 keV. The average IPC to the four adjacent pixels is measured to be 0.25 $pm$ 0.2 % (i.e. consistent with zero). The pixel-to-pixel gain variation is measured to be 0.80 $pm$ 0.03 %, and a Monte Carlo simulation is applied to better characterize the contributions to the energy resolution.
We present preliminary characterization of the Speedster-EXD, a new event driven hybrid CMOS detector (HCD) developed in collaboration with Penn State University and Teledyne Imaging Systems. HCDs have advantages over CCDs including lower susceptibil
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