An analysis of recent experimental data for high-performance In0.7Ga0.3As high electron mobility transistors (HEMTs) is presented. Using a fully quantum mechanical, ballistic model, we simulate In0.7Ga0.3As HEMTs with gate lengths of LG = 60nm, 85, a
nd 135 nm and compare the result to the measured I-V characteristics including draininduced barrier lowering, sub-threshold swing, and threshold voltage variation with gate insulator thickness, as well as on-current performance. To first order, devices with three different oxide thicknesses and channel lengths can all be described by our ballistic model with appropriate values of parasitic series resistance. For high gate voltages, however, the ballistic simulations consistently overestimate the measured on-current, and they do not show the experimentally observed decrease in on-current with increasing gate length. With no parasitic series resistance at all, the simulated on-current of the LG = 60 nm device is about twice the measured current. According to the simulation, the estimated ballistic carrier injection velocity for this device is about 2.7 x 10^7 cm/s. Because of the importance of the semiconductor capacitance, the simulated gate capacitance is about 2.5 times less than the insulator capacitance. Possible causes of the transconductance degradation observed under high gate voltages in these devices are also explored. In addition to a possible gate-voltage dependent scattering mechanism, the limited ability of the source to supply carriers to the channel, and the effect of nonparabolicity are likely to play a role. The drop in on-current with increasing gate length is an indication that the devices operate below the ballistic limit.
Bandstructure effects in PMOS transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 20-band sp3d5s* spin-orbit-coupled (SO) atomistic tight-binding model coupled to a self co
nsistent Poisson solver is used for the valence band dispersion calculation. A ballistic FET model is used to evaluate the capacitance and current-voltage characteristics. The dispersion shapes and curvatures are strong functions of device size, lattice orientation, and bias, and cannot be described within the effective mass approximation. The anisotropy of the confinement mass in the different quantization directions can cause the charge to preferably accumulate in the (110) and secondly on the (112) rather than (100) surfaces, leading to significant charge distributions for different wire orientations. The total gate capacitance of the nanowire FET devices is, however, very similar for all wires in all the transport orientations investigated ([100], [110], [111]), and is degraded from the oxide capacitance by ~30%. The [111] and secondly the [110] oriented nanowires indicate highest carrier velocities and better ON-current performance compared to [100] wires. The dispersion features and quantization behavior, although a complicated function of physical and electrostatic confinement, can be explained at first order by looking at the anisotropic shape of the heavy-hole valence band.
The ballistic performance of electron transport in nanowire transistors is examined using a 10 orbital sp3d5s* atomistic tight-binding model for the description of the electronic structure, and the top-of-the-barrier semiclassical ballistic model for
calculation of the transport properties of the transistors. The dispersion is self consistently computed with a 2D Poisson solution for the electrostatic potential in the cross section of the wire. The effective mass of the nanowire changes significantly from the bulk value under strong quantization, and effects such as valley splitting strongly lift the degeneracies of the valleys. These effects are pronounced even further under filling of the lattice with charge. The effective mass approximation is in good agreement with the tight binding model in terms of current-voltage characteristics only in certain cases. In general, for small diameter wires, the effective mass approximation fails.
Bandstructure effects in the electronic transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 10-band sp3d5s* semi-empirical atomistic tight-binding model coupled to a self c
onsistent Poisson solver is used for the dispersion calculation. A semi-classical, ballistic FET model is used to evaluate the current-voltage characteristics. It is found that the total gate capacitance is degraded from the oxide capacitance value by 30% for wires in all the considered transport orientations ([100], [110], [111]). Different wire directions primarily influence the carrier velocities, which mainly determine the relative performance differences, while the total charge difference is weakly affected. The velocities depend on the effective mass and degeneracy of the dispersions. The [110] and secondly the [100] oriented 3nm thick nanowires examined, indicate the best ON-current performance compared to [111] wires. The dispersion features are strong functions of quantization. Effects such as valley splitting can lift the degeneracies especially for wires with cross section sides below 3nm. The effective masses also change significantly with quantization, and change differently for different transport orientations. For the cases of [100] and [111] wires the masses increase with quantization, however, in the [110] case, the mass decreases. The mass variations can be explained from the non-parabolicities and anisotropies that reside in the first Brillouin zone of silicon.
A real-space quantum transport simulator for carbon nanoribbon (CNR) MOSFETs has been developed. Using this simulator, the performance of carbon nanoribbon (CNR) MOSFETs is examined in the ballistic limit. The impact of quantum effects on device perf
ormance of CNR MOSFETs is also studied. We found that 2D semi-infinite graphene contacts provide metal-induced-gap-states (MIGS) in the CNR channel. These states would provide quantum tunneling in the short channel device and cause Fermi level pining. These effects cause device performance degradation both on the ON-state and the OFF-state. Pure 1D devices (infinite contacts), however, show no MIGS. Quantum tunneling effects are still playing an important role in the device characteristics. Conduction due to band-to-band tunneling is accurately captured in our simulations. It is important in these devices, and found to dominate the off-state current. Based on our simulations, both a 1.4nm wide and a 1.8nm wide CNR with channel length of 12.5nm can outperform ultra scaled Si devices in terms of drive current capabilities and electrostatic control. Although subthreshold slopes in the forward-bias conduction are better than in Si transistors, tunneling currents are important and prevent the achievement of the theoretical limit of 60mV/dec.
