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Register a new userAchieving short high-quality gate-all-around structures for horizontal nanowire field-effect transistors
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We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned to the bottom gates to form gate-all-around structures. This approach overcomes significant limitations in minimal obtainable gate length and gate-length control in previous horizontal wrap-gated nanowire transistors that arise because the gate is defined by wet etching. In the method presented here gate-length control is limited by the resolution of the electron-beam-lithography process. We demonstrate the versatility of our approach by fabricating a device with an independent bottom gate, top gate, and gate-all-around structure as well as a device with three independent gate-all-around structures with 300 nm, 200 nm, and 150 nm gate length. Our method enables us to achieve sub-threshold swings as low as 38 mV/dec at 77 K for a 150 nm gate length.
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We report the development of nanowire field-effect transistors featuring an ultra-thin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally-coated nanowires, which we used to produce functional $Omega$-gate and gate-all-around structures. These give sub-threshold swings as low as 140 mV/dec and on/off ratios exceeding $10^3$ at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically-treated nanowire surfaces; a feature generally not possible with oxides produced by atomic layer deposition due to the surface `self-cleaning effect. Our results highlight the potential for parylene as an alternative ultra-thin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylenes well-established biocompatible properties.
We report a new approach to integrating high-k{appa} dielectrics in both bottom- and top-gated MoS2 field-effect transistors (FETs) through thermal oxidation and mechanical assembly of layered twodimensional (2D) TaS2. Combined X-ray photoelectron spectroscopy (XPS), optical microscopy, atomic force microscopy (AFM), and capacitance-voltage (C-V) measurements confirm that multilayer TaS2 flakes can be uniformly transformed to Ta2O5 with a high dielectric constant of ~ 15.5 via thermal oxidation, while preserving the geometry and ultra-smooth surfaces of 2D TMDs. Top-gated MoS2 FETs fabricated using the thermally oxidized Ta2O5 as gate dielectric demonstrate a high current on/off ratio approaching 106, a subthreshold swing (SS) down to 61 mV/dec, and a field-effect mobility exceeding 60 cm2V-1 s-1 at room temperature, indicating high dielectric quality and low interface trap density.
Non-volatile memory devices have been limited to flash architectures that are complex devices. Here, we present a unique photomemory effect in MoS$_2$ transistors. The photomemory is based on a photodoping effect - a controlled way of manipulating the density of free charges in monolayer MoS$_2$ using a combination of laser exposure and gate voltage application. The photodoping promotes changes on the conductance of MoS$_2$ leading to photomemory states with high memory on/off ratio. Such memory states are non-volatile with an expectation of retaining up to 50 % of the information for tens of years. Furthermore, we show that the photodoping is gate-tunable, enabling control of the recorded memory states. Finally, we propose a model to explain the photodoping, and we provide experimental evidence supporting such a phenomenon. In summary, our work includes the MoS$_2$ phototransistors in the non-volatile memory devices and expands the possibilities of memory application beyond conventional memory architectures.
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