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Register a new userReply to arXiv:2102.11963, An experimental demonstration of the memristor test, Y. V. Pershin, J. Kim, T. Datta, M. Di Ventra, 23 Feb 2021. Does an ideal memristor truly exist?
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Frank Zhigang Wang
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After a decade of research, we developed a prototype device and experimentally demonstrated that the direct phi q interaction could be memristive, as predicted by Chua in 1971. With a constant input current to avoid any parasitic inductor effect, our device meets three criteria for an ideal memristor: a single valued, nonlinear, continuously differentiable, and strictly monotonically increasing constitutive phi q curve, a pinched v i hysteresis loop, and a charge only dependent resistance. Our work represents a step forward in terms of experimentally verifying the memristive flux charge interaction but we have not reached the final because this prototype still suffers from two serious limitations: 1, a superficial but dominant inductor effect (behind which the above memristive fingerprints hide) due to its inductor-like core structure, and 2. bistability and dynamic sweep of a continuous resistance range. In this article, we also discuss how to make a fully functioning ideal memristor with multiple or an infinite number of stable states and no parasitic inductance, and give a number of suggestions, such as open structure, nanoscale size, magnetic materials with cubic anisotropy (or even isotropy), and sequential switching of the magnetic domains. Additionally, we respond to a recent challenge from arXiv.org that claims that our device is simply an inductor with memory since our device did not pass their designed capacitor-memristor circuit test. Contrary to their conjecture that an ideal memristor may not exist or may be a purely mathematical concept, we remain optimistic that researchers will discover an ideal memristor in nature or make one in the laboratory based on our current work.
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A simple and unambiguous test has been recently suggested [J. Phys. D: Applied Physics, 52, 01LT01 (2018)] to check experimentally if a resistor with memory is indeed a memristor, namely a resistor whose resistance depends only on the charge that flows through it, or on the history of the voltage across it. However, although such a test would represent the litmus test for claims about memristors (in the ideal sense), it has yet to be applied widely to actual physical devices. In this paper, we experimentally apply it to a current-carrying wire interacting with a magnetic core, which was recently claimed to be a memristor (so-called `$Phi$ memristor) [J. Appl. Phys. 125, 054504 (2019)]. The results of our experiment demonstrate unambiguously that this `$Phi$ memristor is not a memristor: it is simply an inductor with memory. This demonstration casts further doubts that ideal memristors do actually exist in nature or may be easily created in the lab.
In this reply, we will provide our impersonal, point-to-point responses to the major criticisms (in bold and underlined) in arXiv:1909.12464. Firstly, we will identify a number of (imperceptibly hidden) mistakes in the Comment in understanding/interpreting our physical model. Secondly, we will use a 3rd-party experiment carried out in 1961 (plus other 3rd-party experiments thereafter) to further support our claim that our invented Phi memristor is memristive in spite of the existence of a parasitic inductor effect. Thirdly, we will analyse this parasitic effect mathematically, introduce our work-in-progress (in nanoscale) and point out that this parasitic inductor effect should not become a big worry since it can be completely removed in the macro-scale devices and safely neglected in the nano-scale devices.
Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.
Memristors are continuously tunable resistors that emulate synapses. Conceptualized in the 1970s, they traditionally operate by voltage-induced displacements of matter, but the mechanism remains controversial. Purely electronic memristors have recently emerged based on well-established physical phenomena with albeit modest resistance changes. Here we demonstrate that voltage-controlled domain configurations in ferroelectric tunnel barriers yield memristive behaviour with resistance variations exceeding two orders of magnitude and a 10 ns operation speed. Using models of ferroelectric-domain nucleation and growth we explain the quasi-continuous resistance variations and derive a simple analytical expression for the memristive effect. Our results suggest new opportunities for ferroelectrics as the hardware basis of future neuromorphic computational architectures.
Non-volatile resistive switching, also known as memristor effect in two terminal devices, has emerged as one of the most important components in the ongoing development of high-density information storage, brain-inspired computing, and reconfigurable systems. Recently, the unexpected discovery of memristor effect in atomic monolayers of transitional metal dichalcogenide sandwich structures has added a new dimension of interest owing to the prospects of size scaling and the associated benefits. However, the origin of the switching mechanism in atomic sheets remains uncertain. Here, using monolayer MoS$_2$ as a model system, atomistic imaging and spectroscopy reveal that metal substitution into sulfur vacancy results in a non-volatile change in resistance. The experimental observations are corroborated by computational studies of defect structures and electronic states. These remarkable findings provide an atomistic understanding on the non-volatile switching mechanism and open a new direction in precision defect engineering, down to a single defect, for achieving optimum performance metrics including memory density, switching energy, speed, and reliability using atomic nanomaterials.
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