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Register a new userTransfer of graphene onto arbitrary substrates via sublimable carrier
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Authors
Yu-Hao Deng
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Graphene, a monolayer of carbon atoms packed into a two-dimensional crystal structure, attracted intense attention owing to its unique structure and optical, electronic properties. Recent advances in chemical vapor deposition (CVD) have led to the batch production of high quality graphene on metal foils. However, further applications are required in the way these graphenes are transferred from their growth substrates onto the target substrate. Here, we report a sublimable carrier method that allows the graphene to be transferred with high quality onto arbitrary substrates, including semiconductor, metal and organic substrates. The intrinsic problems of the residue and environmentally unfriendly organic solvents have been solved due to the polymer-free process. Optical microscopy, scanning electron microscopy (SEM) and Raman spectroscopy demonstrate the high quality and clean surface of the transferred graphene. This work provides a new way of optimizing graphene transfer and widens the applications of graphene in large-scale 2D electronics.
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Metal halide perovskites single-crystalline thin films (SCTFs) have recently emerged as promising materials for the next generation of optoelectronic devices due to their superior intrinsic properties. However, it is still challenging to transfer and integrate them with other functional materials for hybrid multilayer devices because of their substrate-dependent growth. Herein, a method that allows the SCTFs to be transferred with high quality onto arbitrary substrates has been reported. By introducing hydrophobic treatment to the growth substrates, the adhesion between SCTFs and growth substrates is reduced. Meanwhile, anti-solvent intercalation technique is used to peel off SCTFs from the growth substrates intactly. Finally, centimeter-scale perovskite SCTF has been successfully transferred to target substrate. This work opens up a new route to transfer large-scale perovskite SCTFs, providing a platform to widen the applications of perovskite SCTFs in large-scale hybrid multilayer optoelectronic devices.
We show that it is possible to prepare and identify ultra--thin sheets of graphene on crystalline substrates such as SrTiO$_3$, TiO$_2$, Al$_2$O$_3$ and CaF$_2$ by standard techniques (mechanical exfoliation, optical and atomic force microscopy). On the substrates under consideration we find a similar distribution of single, bi- and few layer graphene and graphite flakes as with conventional SiO$_2$ substrates. The optical contrast $C$ of a single graphene layer on any of those substrates is determined by calculating the optical properties of a two-dimensional metallic sheet on the surface of a dielectric, which yields values between $C=$ ~- 1.5% (G/TiO$_2$) and $C=$ ~- 8.8% (G/CaF$_2$). This contrast is in reasonable agreement with experimental data and is sufficient to make identification by an optical microscope possible. The graphene layers cover the crystalline substrate in a carpet-like mode and the height of single layer graphene on any of the crystalline substrates as determined by atomic force microscopy is $d_{SLG}=0.34$ nm and thus much smaller than on SiO$_2$.
This paper describes the behavior of top gated transistors fabricated using carbon, particularly epitaxial graphene on SiC, as the active material. In the past decade research has identified carbon-based electronics as a possible alternative to silicon-based electronics. This enthusiasm was spurred by high carbon nanotube carrier mobilities. However, nanotube production, placement, and control are all serious issues. Graphene, a thin sheet of graphitic carbon, can overcome some of these problems and therefore is a promising new electronic material. Although graphene devices have been built before, in this work we provide the first demonstration and systematic evaluation of arrays of a large number of transistors entirely produced using standard microelectronics methods. Graphene devices presented feature high-k dielectric, mobilities up to 5000 cm2/Vs and, Ion/Ioff ratios of up to 7, and are methodically analyzed to provide insight into the substrate properties. Typical of graphene, these micron-scale devices have negligible band gaps and therefore large leakage currents.
Single atoms and few-atom nanoclusters are of high interest in catalysis and plasmonics, but pathways for their fabrication and stable placement remain scarce. We report here the self-assembly of room-temperature-stable single indium (In) atoms and few-atom In clusters (2-6 atoms) that are anchored to substitutional silicon (Si) impurity atoms in suspended monolayer graphene membranes. Using atomically resolved scanning transmission electron microscopy (STEM), we find that the exact atomic arrangements of the In atoms depend strongly on the original coordination of the Si anchors in the graphene lattice: Single In atoms and In clusters with 3-fold symmetry readily form on 3-fold coordinated Si atoms, whereas 4-fold symmetric clusters are found attached to 4-fold coordinated Si atoms. All structures are produced by our fabrication route without the requirement for electron-beam induced materials modification. In turn, when activated by electron beam irradiation in the STEM, we observe in situ the formation, restructuring and translation dynamics of the Si-anchored In structures: Hexagon-centered 4-fold symmetric In clusters can (reversibly) transform into In chains or In dimers, whereas C-centered 3-fold symmetric In clusters can move along the zig-zag direction of the graphene lattice due to the migration of Si atoms during electron-beam irradiation, or transform to Si-anchored single In atoms. Our results provide a novel framework for the controlled self-assembly and heteroatomic anchoring of single atoms and few-atom clusters on graphene.
We describe a simple and scalable method for the transfer of CVD graphene for the fabrication of field effect transistors. This is a dry process that uses a modified RCA cleaning step to improve the surface quality. In contrast to conventional fabrication routes where lithographic steps are performed after the transfer, here graphene is transferred to a pre-patterned substrate. The resulting FET devices display nearly zero Dirac voltage, and the contact resistance between the graphene and metal contacts is on the order of 910 +- 340 Ohm-micrometer. This approach enables formation of conducting graphene channel lengths up to one millimeter. The resist-free transfer process provides a clean graphene surface that is promising for use in high sensitivity graphene FET biosensors.
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