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Prototype design of singles processing unit for the small animal PET

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 Added by Lei Zhao
 Publication date 2019
  fields Physics
and research's language is English




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Position Emission Tomography (PET) is an advanced clinical diagnostic imaging technique for nuclear medicine. Small animal PET is increasingly uesd for studying the animal model of disease, new drugs and new therapies. A prototype of Singles Processing Unit (SPU) for a small animal PET system was designed to obtain the time, energy, and position information. The energy and position is actually calculated through high precison charge measurement, which is based on amplification, shaping, A/D conversion and area calculation in digital signal processing domian. Analysis and simulations were also conducted to optimize the key parameters in system design. Initial tests indicate that the charge and time precision is better than 0.3% FWHM and 350 ps FWHM respectively, while the position resolution is better than 0.35% FWHM. Commination tests of the SPU prototype with the PET detector indicate that the system time precision is better than 2.5 ns, while the flood map and energy spectra concored well with the expected.



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Small animal Positron Emission Tomography (PET) is dedicated to small animal imaging, which requires high position and energy precision, as well as good flexibility and efficiency of the electronics. This paper presents the design of a digital signal processing logic for a marmoset brain PET system based on LYSO crystal arrays, SiPMs, and the resistive network readout method. We implement 32-channel signal processing in a single Xilinx Artix-7 Field-Programmable Gate Array (FPGA). The logic is designed to support four online modes which are regular data processing mode, flood map construction mode, energy spectrum construction mode, and raw data mode. Several functions are integrated, including two-dimensional (2D) raw position calculation, crystal locating, events filtering, and synchronization detection. Furthermore, a series of online corrections is also integrated, such as photon peak correction to 511 keV and time measurement result correction with crystal granularity. A Gigabit Ethernet interface is utilized for data transfer, Look-Up Tables (LUTs) configuration, and command issuing. The pipeline logic works at 125 MHz with a signal processing capability beyond the required data rate of 1,000,000 events/s/channel. A series of initial tests are conducted. The results indicate that the logic design meets the application requirement.
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The TT-PET collaboration is developing an MRI-compatible small animal PET scanner in which the sensitive element is a monolithic silicon pixel ASIC targeting 30 ps RMS time resolution. The photon-detection technique is based on a stack of alternating layers of high-Z photon converter and 100 $mathrm{mu m}$ silicon sensors, to produce a scanner with 0.5 $mathrm{times}$ 0.5 $mathrm{times}$ 0.2 $mathrm{mm^{3}}$ granularity for precise depth-of-interaction measurement. In this paper we present the results of simulation studies for the expected data rate, time-of-flight and spatial resolution, as well as the performance of image reconstruction with and without the use of timing information.
Small animal Positron Emission Tomography (PET) is dedicated to small animal imaging. Animals used in experiments, such as rats and monkeys, are often much smaller than human bodies, which requires higher position and energy precision of the PET imaging system. Besides, Flexibility, high efficiency are also the major demands of a practical PET system. These requires a high-quality analog front-end and a digital signal processing logic with high efficiency and compatibility of multiple data processing modes. The digital signal processing logic of the small animal PET system presented in this paper implements 32-channel signal processing in a single Xilinx Artix-7 family of Field-Programmable Gate Array (FPGA). The logic is designed to support three online modes which are regular package mode, flood map and energy spectrum histogram. Several functions are integrated, including two-dimensional (2D) raw position calculation, crystal identification, events filtering, etc. Besides, a series of online corrections are also integrated, such as photon peak correction to 511 keV and timing offset correction with crystal granularity. A Gigabit Ethernet interface is utilized for data transfer, Look-Up Tables (LUTs) configuration and commands issuing. The pipe-line logic processes the signals at 125 MHz with a rate of 1,000,000 events/s. A series of initial tests are conducted. The results indicate that the digital processing logic achieves the expectations.
190 - Cong Ma , Xue Dong , Li Yu 2021
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